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參數(shù)資料
| 型號(hào)： | X24C02BM |
| 廠商： | IC MICROSYSTEMS Sdn. Bhd. |
| 英文描述： | Serial E2PROM |
| 中文描述： | 串行E2PROM |
| 文件頁(yè)數(shù)： | 8/16頁(yè) |
| 文件大?。?/td> | 308K |
| 代理商： | X24C02BM |
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X24C02
8
Sequential Read
Sequential Read can be initiated as either a current
address read or random access read. The first word is
transmitted as with the other modes, however, the
master now responds with an acknowledge, indicating it
requires additional data. The X24C02 continues to output
data for each acknowledge received. The master
terminates this transmission by issuing a stop condition,
omitting the ninth clock cycle acknowledge.
Figure 9. Sequential Read
Figure 10. Typical System Configuration
MASTER
TRANSMITTER/
RECEIVER
SLAVE
RECEIVER
SLAVE
TRANSMITTER/
RECEIVER
MASTER
TRANSMITTER
MASTER
TRANSMITTER/
RECEIVER
SDA
SCL
VCC
BUS ACTIVITY:
MASTER
SDA LINE
BUS ACTIVITY:
X24C02
SLAVE
ADDRESS
A
C
K
A
C
K
DATA n+x
S
T
O
P
P
DATA n
A
C
K
DATA n+1
A
C
K
DATA n+2
3838 FHD F15
3838 FHD F16
The data output is sequential, with the data from address
and followed by the data from n + 1. The address counter
for read operations increments all address bits, allowing the
entire memory contents to be serially read during
one operation. At the end of the address space (address 255),
the counter “rolls over” to address 0 and the
X24C02 continues to output data for each acknowledge
received. Refer to Figure 9 for the address, acknowl
edge
and data transfer sequence.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| X24C02BP | Serial E2PROM |
| X24C02BS8 | Serial E2PROM |
| X24C02C | Serial E2PROM |
| X24C02CG | Serial E2PROM |
| X24C02CM | Serial E2PROM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X24C02BP | 制造商:ICMIC 制造商全稱:IC MICROSYSTEMS 功能描述:Serial E2PROM |
| X24C02BS8 | 制造商:ICMIC 制造商全稱:IC MICROSYSTEMS 功能描述:Serial E2PROM |
| X24C02C | 制造商:ICMIC 制造商全稱:IC MICROSYSTEMS 功能描述:Serial E2PROM |
| X24C02CG | 制造商:ICMIC 制造商全稱:IC MICROSYSTEMS 功能描述:Serial E2PROM |
| X24C02CM | 制造商:ICMIC 制造商全稱:IC MICROSYSTEMS 功能描述:Serial E2PROM |
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