參數(shù)資料
型號: X24645SIG-2.7
廠商: IC MICROSYSTEMS SDN BHD
元件分類: DRAM
英文描述: Advanced 2-Wire Serial E2PROM with Block LockTM Protection
中文描述: 8K X 8 I2C/2-WIRE SERIAL EEPROM, PDSO14
封裝: ROHS COMPLIANT, PLASTIC, SOIC-14
文件頁數(shù): 3/18頁
文件大?。?/td> 331K
代理商: X24645SIG-2.7
X24645
3
Figure 1. Data Validity
Figure 2. Definition of Start and Stop
DEVICE OPERATION
The X24645 supports a bidirectional bus oriented pro-
tocol. The protocol defines any device that sends data
onto the bus as a transmitter, and the receiving device as
the receiver. The device controlling the transfer is a
master and the device being controlled is the slave.
The master will always initiate data transfers, and provide
the clock for both transmit and receive operations.
Therefore, the X24645 will be considered a slave in all
applications.
Clock and Data Conventions
Data states on the SDA line can change only during
SCL LOW. SDA state changes during SCL HIGH are
reserved for indicating start and stop conditions. Refer to
Figures 1 and 2.
Start Condition
All command are preceded by the start condition, which
is a HIGH to LOW transition of SDA when SCL is
HIGH. The X24645 continuously monitors the SDA and SCL
lines for the start condition and will not respond to
any command until this condition has been met.
SCL
SDA
DATA STABLE
DATA
CHANGE
2783 ILL F04
SCL
SDA
START BIT
STOP BIT
2783 ILL F05
Notes:
(5) Typical values are for T
A
= 25
°
C and nominal supply voltage (5V)
(6) t
WR
is the minimum cycle time from the system perspective when polling techniques are not used. It is the maximum time the
device requires to perform the internal write operation.
相關(guān)PDF資料
PDF描述
X24645SMG Advanced 2-Wire Serial E2PROM with Block LockTM Protection
X24645SMG-2.7 ED,SMD 1206,RED,660NM, WATER CLEAR,30MCD@20mA
X24645VG ED,SMD 1206,GREEN,570NM, WATER CLEAR,6.5MCD@20mA
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