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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | X1227S8-2.7A |
| 寤犲晢锛� | Intersil |
| 鏂囦欢闋佹暩(sh霉)锛� | 26/28闋� |
| 鏂囦欢澶у皬锛� | 0K |
| 鎻忚堪锛� | IC RTC CPU SUP WDT 4K EE 8-SOIC |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 100 |
| 椤炲瀷锛� | 鏅�(sh铆)閻�/鏃ユ |
| 鐗归粸(di菐n)锛� | 璀﹀牨(b脿o)鍣�锛岄枏骞�锛岀洠(ji膩n)鎺у櫒锛岀洠(ji膩n)瑕栬▓(j矛)鏅�(sh铆)鍣� |
| 鏅�(sh铆)闁撴牸寮忥細 | HH:MM:SS锛�12/24 灏忔檪(sh铆)锛� |
| 鏁�(sh霉)鎿�(j霉)鏍煎紡锛� | YY-MM-DD-dd |
| 鎺ュ彛锛� | I²C锛�2 绶氫覆鍙� |
| 闆绘簮闆诲锛� | 2.7 V ~ 5.5 V |
| 闆诲 - 闆绘簮锛岄浕姹狅細 | 1.8 V ~ 5.5 V |
| 宸ヤ綔婧害锛� | 0°C ~ 70°C |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 8-SOIC锛�0.154"锛�3.90mm 瀵級 |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 8-SOIC |
| 鍖呰锛� | 绠′欢 |
| 鍏跺畠鍚嶇ū锛� | X1227S82.7A |
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7
FN8099.2
May 8, 2006
Write Cycle Timing
Power-up Timing
Notes: (1) Delays are measured from the time VCC is stable until the specified operation can be initiated. These parameters are periodically
sampled and not 100% tested.
(2) Typical values are for TA = 25掳C and VCC = 5.0V
Nonvolatile Write Cycle Timing
Notes: (1) tWC is the time from a valid stop condition at the end of a write sequence to the end of the self-timed internal nonvolatile write cycle. It is
the minimum cycle time to be allowed for any nonvolatile write by the user, unless Acknowledge Polling is used.
WATCHDOG TIMER/LOW VOLTAGE RESET OPERATING CHARACTERISTICS
Watchdog/Low Voltage Reset Parameters
SCL
SDA
tWC
8th Bit of Last Byte
ACK
Stop
Condition
Start
Condition
Symbol
Parameter
Min.
Typ.(2)
Max.
Units
tPUR(1)
Time from Power-up to Read
1
ms
tPUW(1)
Time from Power-up to Write
5
ms
Symbol
Parameter
Min.
Typ.(1)
Max.
Units
tWC(1)
Write Cycle Time
5
10
ms
Symbols
Parameters
Min.
Typ.
Max.
Unit
VPTRIP
Programmed Reset Trip Voltage
X1227-4.5A
X1227
X1227-2.7A
X1227-2.7
4.5
4.25
2.7
2.55
4.68
4.38
2.93
2.68
4.75
4.5
3.0
2.7
V
tRPD
VCC Detect to RESET LOW
500
ns
tPURST
Power-up Reset Time-out Delay
100
200
400
ms
tF
VCC Fall Time
10
s
tR
VCC Rise Time
10
s
tWDO
Watchdog Timer Period:
WD1 = 0, WD0 = 0
WD1 = 0, WD0 = 1
WD1 = 1, WD0 = 0
1.7
725
225
1.75
750
250
1.8
775
275
s
ms
tRST
Watchdog Reset Time-out Delay
225
250
275
ms
tRSP
2-Wire interface
1
s
VRVALID
Reset Valid VCC
1.0
V
X1227
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鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| X1227S8-4.5A | 鍔熻兘鎻忚堪:IC RTC CPU SUP WDT 4K EE 8-SOIC RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏅�(sh铆)閻�/瑷�(j矛)鏅�(sh铆) - 瀵�(sh铆)鏅�(sh铆)鏅�(sh铆)閻� 绯诲垪:- 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Obsolescence Mitigation Program 妯�(bi膩o)婧�(zh菙n)鍖呰:1 绯诲垪:- 椤炲瀷:鏅�(sh铆)閻�/鏃ユ 鐗归粸(di菐n):璀﹀牨(b脿o)鍣�锛岄枏骞达紝SRAM 瀛樺劜(ch菙)瀹归噺:- 鏅�(sh铆)闁撴牸寮�:HH:MM:SS锛�12/24 灏忔檪(sh铆)锛� 鏁�(sh霉)鎿�(j霉)鏍煎紡:YY-MM-DD-dd 鎺ュ彛:SPI 闆绘簮闆诲:2 V ~ 5.5 V 闆诲 - 闆绘簮锛岄浕姹�:- 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:8-WDFN 瑁搁湶鐒婄洡 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:8-TDFN EP 鍖呰:绠′欢 |
| X1227S8I | 鍔熻兘鎻忚堪:IC RTC/CAL/CPU SUP EE 8-SOIC RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏅�(sh铆)閻�/瑷�(j矛)鏅�(sh铆) - 瀵�(sh铆)鏅�(sh铆)鏅�(sh铆)閻� 绯诲垪:- 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Obsolescence Mitigation Program 妯�(bi膩o)婧�(zh菙n)鍖呰:1 绯诲垪:- 椤炲瀷:鏅�(sh铆)閻�/鏃ユ 鐗归粸(di菐n):璀﹀牨(b脿o)鍣紝闁忓勾锛孲RAM 瀛樺劜(ch菙)瀹归噺:- 鏅�(sh铆)闁撴牸寮�:HH:MM:SS锛�12/24 灏忔檪(sh铆)锛� 鏁�(sh霉)鎿�(j霉)鏍煎紡:YY-MM-DD-dd 鎺ュ彛:SPI 闆绘簮闆诲:2 V ~ 5.5 V 闆诲 - 闆绘簮锛岄浕姹�:- 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:8-WDFN 瑁搁湶鐒婄洡 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:8-TDFN EP 鍖呰:绠′欢 |
| X1227S8I-2.7 | 鍔熻兘鎻忚堪:IC RTC/CAL/CPU SUP EE 8-SOIC RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏅�(sh铆)閻�/瑷�(j矛)鏅�(sh铆) - 瀵�(sh铆)鏅�(sh铆)鏅�(sh铆)閻� 绯诲垪:- 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Obsolescence Mitigation Program 妯�(bi膩o)婧�(zh菙n)鍖呰:1 绯诲垪:- 椤炲瀷:鏅�(sh铆)閻�/鏃ユ 鐗归粸(di菐n):璀﹀牨(b脿o)鍣紝闁忓勾锛孲RAM 瀛樺劜(ch菙)瀹归噺:- 鏅�(sh铆)闁撴牸寮�:HH:MM:SS锛�12/24 灏忔檪(sh铆)锛� 鏁�(sh霉)鎿�(j霉)鏍煎紡:YY-MM-DD-dd 鎺ュ彛:SPI 闆绘簮闆诲:2 V ~ 5.5 V 闆诲 - 闆绘簮锛岄浕姹�:- 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:8-WDFN 瑁搁湶鐒婄洡 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:8-TDFN EP 鍖呰:绠′欢 |
| X1227S8I-2.7A | 鍔熻兘鎻忚堪:IC RTC/CAL/CPU SUP EE 8-SOIC RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏅�(sh铆)閻�/瑷�(j矛)鏅�(sh铆) - 瀵�(sh铆)鏅�(sh铆)鏅�(sh铆)閻� 绯诲垪:- 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Obsolescence Mitigation Program 妯�(bi膩o)婧�(zh菙n)鍖呰:1 绯诲垪:- 椤炲瀷:鏅�(sh铆)閻�/鏃ユ 鐗归粸(di菐n):璀﹀牨(b脿o)鍣紝闁忓勾锛孲RAM 瀛樺劜(ch菙)瀹归噺:- 鏅�(sh铆)闁撴牸寮�:HH:MM:SS锛�12/24 灏忔檪(sh铆)锛� 鏁�(sh霉)鎿�(j霉)鏍煎紡:YY-MM-DD-dd 鎺ュ彛:SPI 闆绘簮闆诲:2 V ~ 5.5 V 闆诲 - 闆绘簮锛岄浕姹�:- 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:8-WDFN 瑁搁湶鐒婄洡 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:8-TDFN EP 鍖呰:绠′欢 |
| X1227S8I-2.7AT1 | 鍔熻兘鎻忚堪:IC RTC/CAL/CPU SUP EE 8-SOIC RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏅�(sh铆)閻�/瑷�(j矛)鏅�(sh铆) - 瀵�(sh铆)鏅�(sh铆)鏅�(sh铆)閻� 绯诲垪:- 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Obsolescence Mitigation Program 妯�(bi膩o)婧�(zh菙n)鍖呰:1 绯诲垪:- 椤炲瀷:鏅�(sh铆)閻�/鏃ユ 鐗归粸(di菐n):璀﹀牨(b脿o)鍣�锛岄枏骞达紝SRAM 瀛樺劜(ch菙)瀹归噺:- 鏅�(sh铆)闁撴牸寮�:HH:MM:SS锛�12/24 灏忔檪(sh铆)锛� 鏁�(sh霉)鎿�(j霉)鏍煎紡:YY-MM-DD-dd 鎺ュ彛:SPI 闆绘簮闆诲:2 V ~ 5.5 V 闆诲 - 闆绘簮锛岄浕姹�:- 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:8-WDFN 瑁搁湶鐒婄洡 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:8-TDFN EP 鍖呰:绠′欢 |
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