參數(shù)資料
型號: X1203S8I
英文描述: 30V Single N-Channel HEXFET Power MOSFET in a D-Pak package; Similar to IRFR3303 with Lead Free Packaging
中文描述: 實時時鐘
文件頁數(shù): 10/20頁
文件大?。?/td> 88K
代理商: X1203S8I
X1203
Characteristics subject to change without notice.
10 of 20
Figure 8. Acknowledge Polling Sequence
READ OPERATIONS
There are three basic read operations: Current
Address Read, Random Read, and Sequential Read.
Current Address Read
Internally the device contains an address counter that
maintains the address of the last word read incre-
mented by one. Therefore, if the last read was to
address n, the next read operation would access data
from address n+1.
Upon receipt of the slave address byte with the R/W bit
set to one, the device issues an acknowledge and then
transmits the eight bits of the data byte. The master
terminates the read operation when it does not
respond with an acknowledge during the ninth clock
and then issues a stop condition. Refer to Figure 9 for
the address, acknowledge, and data transfer sequence.
It should be noted that the ninth clock cycle of the read
operation is not a “don’t care.” To terminate a read
operation, the master must either issue a stop condi-
tion during the ninth cycle or hold SDA HIGH during
the ninth clock cycle and then issue a stop condition.
ACK
returned
Issue Slave
Address Byte
(Read or Write)
Byte load completed
by issuing STOP.
Enter ACK Polling
Issue STOP
Issue START
NO
YES
Issue STOP
NO
Continue normal
Read or Write
command
sequence
PROCEED
YES
non volatile write
Cycle complete.
Continue command
sequence
Figure 9. Current Address Read Sequence
S
t
a
r
t
S
t
o
p
Slave
Address
Data
A
C
K
SDA Bus
Signals from
the Slave
Signals from
the Master
1
1
1
1
1
0
1
1
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