參數(shù)資料
型號(hào)： WV3EG64M64ETSU335D3S
廠商： MICROSEMI CORP-PMG MICROELECTRONICS
元件分類： DRAM
英文描述： 64M X 64 DDR DRAM MODULE, 0.7 ns, DMA184
封裝： DIMM-184
文件頁(yè)數(shù)： 5/10頁(yè)
文件大?。?/td> 236K
代理商： WV3EG64M64ETSU335D3S
White Electronic Designs
4
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
August 2005
Rev. 1
PRELIMINARY
WV3EG64M64ETSU-D3
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Value
Units
Voltage on any pin relative to VSS
VIN, VOUT
-0.5 to 3.6
V
Voltage on VCC supply relative to VSS
VCC
-1.0 to 3.6
V
Voltage on VCCQ supply relative to VSS
VCCQ
-1.0 to 3.6
V
Storage Temperature
TSTG
-55 to +150
°C
Operating Temperature
TA
0 to +70
°C
Power Dissipation
PD
8W
Short Circuit Current
IOS
50
mA
Note: Permanent device damage may occur if ‘ABSOLUTE MAXIMUM RATINGS’ are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability
DC CHARACTERISTICS
0°C
≤ TA ≤ 70°C, VCC = VCCQ = 2.5V ± 0.2V
Parameter
Symbol
Min
Max
Unit
Note
Supply voltage DDR266/DDR333 (nominal VCC of 2.5V)
VCC
2.3
2.7
I/O Supply voltage DDR266/DDR333 (nominal VCC of 2.5V)
VCCQ
2.3
2.7
V
I/O Reference voltage
VREF
0.49*VCCQ
0.51*VCCQ
V1
I/O Termination voltage
VTT
VREF-0.04
VREF+0.04
V
2
Input logic high voltage
VIH(DC)
VREF+0.15
VCCQ+0.30
V
Input logic low voltage
VIL(DC)
-0.3
VREF-0.15
V
Input voltage level, CK and CK#
VIN(DC)
-0.3
VCCQ+0.30
V
Input differential voltage, CK and CK#
VID(DC)
0.36
VCCQ+0.60
V
3
Input crossing point voltage, CK and CK#
VIX(DC)
0.3
VCCQ+0.60
V
Input leakage current
Addr, CAS#,
RAS#, WE#
II
-16
16
uA
CS#, CKE
-16
16
uA
CK, CK#
-6
6
uA
DM
-2
2
uA
Output leakage current
IOZ
-5
5
uA
Output high current (normal strengh); VOUT = V +0.84V
IOH
-16.8
—
mA
Output high current (normal strengh); VOUT = VTT -0.84V
IOL
16.8
—
mA
Output high current (half strengh); VOUT = VTT +0.45V
IOH
-9
—
mA
Output high current (half strengh); VOUT = VTT -0.45V
IOL
9—
mA
NOTES:
1. VREF is expected to be equal to 0.5*VCCQ of the transmitting device, and to track variations in the DC level of the same. Peak to peak noise on VREF may not exceed ±2% of the DC
value
2. VTT is not applied directly to the device. VTT is a system supply for signal termination resistors, is expected to be set equal to VREF, and must track variations in the DC level of VREF
3. VID is the magnitude of the difference between the input level on CK and the input level on CK#.
CAPACITANCE
TA = 25°C, f = 1MHz, VCC = VCCQ = 2.5V
Parameter
Symbol
Min
Max
Unit
Input Capacitance (A0-A12, BA0-BA1, RAS#, CAS#, WE#)
CIN1
20
28
pF
Input Capacitance (CKE0)
CIN2
20
28
pF
Input Capacitance (CS0#)
CIN3
20
28
pF
Input Capacitance (CK0 to CK2, CK0# to CK2#)
CIN4
10
13
pF
Input Capacitance (DM0-DM7)
CIN5
89
pF
Data and DQS input/output capacitance (DQ0-DQ63)
COUT1
89
pF
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