參數(shù)資料
型號(hào): WSF128K32-22H2CA
廠商: WHITE ELECTRONIC DESIGNS CORP
元件分類(lèi): 存儲(chǔ)器
英文描述: SPECIALTY MEMORY CIRCUIT, CPGA66
封裝: CERAMIC, HIP-66
文件頁(yè)數(shù): 6/12頁(yè)
文件大小: 505K
代理商: WSF128K32-22H2CA
3
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
WSF128K32-XH2X
October 2004
Rev. 4
White Electronic Designs Corp. reserves the right to change products or specications without notice.
PRELIMINARY
I
Current Source
D.U.T.
C
= 50 pf
eff
I OL
V ≈ 1.5V
(Bipolar Supply)
Z
Current Source
OH
SRAM AC CHARACTERISTICS
VCC = 5.0V, -55°C ≤ TA ≤ +125°C
Parameter
Read Cycle
Symbol
-25
Units
Min
Max
Read Cycle Time
tRC
25
ns
Address Access Time
tAA
25
ns
Output Hold from Address Change
tOH
0ns
Chip Select Access Time
tACS
25
ns
Output Enable to Output Valid
tOE
15
ns
Chip Select to Output in Low Z
tCLZ1
3ns
Output Enable to Output in Low Z
tOLZ1
0ns
Chip Disable to Output in High Z
tCHZ1
12
ns
Output Disable to Output in High Z
tOHZ1
12
ns
1. This parameter is guaranteed by design but not tested.
SRAM AC CHARACTERISTICS
VCC = 5.0V, -55°C ≤ TA ≤ +125°C
Parameter
Write Cycle
Symbol
-25
Units
Min
Max
Write Cycle Time
tWC
25
ns
Chip Select to End of Write
tCW
20
ns
Address Valid to End of Write
tAW
20
ns
Data Valid to End of Write
tDW
15
ns
Write Pulse Width
tWP
20
ns
Address Setup Time
tAS
3ns
Address Hold Time
tAH
0ns
Output Active from End of Write
tOW1
3ns
Write Enable to Output in High Z
tWHZ1
15
ns
Data Hold from Write Time
tDH
0ns
1. This parameter is guaranteed by design but not tested.
FIGURE 2 – AC TEST CIRCUIT
AC Test Conditions
Parameter
Typ
Unit
Input Pulse Levels
VIL = 0, VIH = 3.0
V
Input Rise and Fall
5
ns
Input and Output Reference Level
1.5
V
Output Timing Reference Level
1.5
V
Notes:
VZ is programmable from -2V to +7V.
IOL & IOH programmable from 0 to 16mA.
Tester Impedance Z0 = 75 Ω.
VZ is typically the midpoint of VOH and VOL.
IOL & IOH are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
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