參數(shù)資料
型號(hào): WS1M8V-20CMA
元件分類: SRAM
英文描述: 1M X 8 STANDARD SRAM, 20 ns, CDIP32
封裝: 0.600 INCH, CERAMIC, DIP-32
文件頁數(shù): 3/5頁
文件大小: 133K
代理商: WS1M8V-20CMA
3
White Microelectronics Phoenix, AZ (602) 437-1520
3
SRAM
DUALITHICS
WS1M8V-XCX
I
Current Source
D.U.T.
C
= 50 pf
eff
I
OL
V
1.5V
(Bipolar Supply)
Z
Current Source
OH
NOTES:
VZ is programmable from -2V to +7V.
IOL & IOH programmable from 0 to 16mA.
Tester Impedance Z0 = 75
.
VZ is typically the midpoint of VOH and VOL.
IOL & IOH are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
AC TEST CIRCUIT
AC TEST CONDITIONS
Parameter
Typ
Unit
Input Pulse Levels
VIL = 0, VIH = 2.5
V
Input Rise and Fall
5
ns
Input and Output Reference Level
1.5
V
Output Timing Reference Level
1.5
V
AC CHARACTERISTICS
(VCC = 3.3V, GND = 0V, TA = -55
°C to +125°C)
Parameter
Symbol
-17
-20
-25
-35
-45
-55
Units
Read Cycle
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Read Cycle Time
tRC
17
20
25
35
45
55
ns
Address Access Time
tAA
17
20
25
35
45
55
ns
Output Hold from Address Change
tOH
000
ns
Chip Select Access Time
tACS
17
20
25
35
45
55
ns
Chip Select to Output in Low Z
tCLZ1
222
444
ns
Chip Disable to Output in High Z
tCHZ1
9
1012
15
2020
ns
1. This parameter is guaranteed by design but not tested.
2. OE is internally tied to GND.
AC CHARACTERISTICS
(VCC = 3.3V, GND = 0V, TA = -55
°C to +125°C)
Parameter
Symbol
-17
-20
-25
-35
-45
-55
Units
Write Cycle
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Write Cycle Time
tWC
17
20
25
35
45
55
ns
Chip Select to End of Write
tCW
14
15
25
35
50
ns
Address Valid to End of Write
tAW
14
15
25
35
50
ns
Data Valid to End of Write
tDW
910
10
2025
25
ns
Write Pulse Width
tWP
14
15
25
35
40
ns
Address Setup Time
tAS
000
0
ns
Address Hold Time
tAH
000
0
5
ns
Output Active from End of Write
tOW1
234
4
5
ns
Write Enable to Output in High Z
tWHZ1
9
10
15
25
ns
Data Hold Time
tDH
000
0
ns
1. This parameter is guaranteed by design but not tested.
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