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參數(shù)資料
| 型號： | WS1M8-85CM |
| 廠商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分類： | SRAM |
| 英文描述： | 1M X 8 STANDARD SRAM, 85 ns, CDIP32 |
| 封裝： | 0.600 INCH, SIDE BRAZED, CERAMIC, DIP-32 |
| 文件頁數(shù)： | 1/5頁 |
| 文件大?。?/td> | 273K |
| 代理商： | WS1M8-85CM |
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White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
WS1M8-XCX
November 2002
Rev. 2
PRELIMINARY*
White Electronic Designs Corp. reserves the right to change products or specications without notice.
2x512Kx8 DUALITHIC SRAM
FEATURES
Access Times 70, 85, 100ns
Evolutionary, Corner Power/Ground Pinout
Packaging:
32 pin, Hermetic Ceramic DIP (Package 300)
Organized as two banks of 512Kx8
Commercial, Industrial and Military Temperature
Ranges
5 Volt Power Supply
Low Power CMOS
TTL Compatible Inputs and Outputs
Output Enable Internally tied to GND.
* This product is under development, is not qualied or characterized and is subject to
change without notice.
NOTE:
1. CS1# and CS2# are used to select the lower and upper 512Kx8 of
the device. CS1# and CS2# must not be enabled at the same time.
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2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
VCC
A15
A17
WE#
A13
A8
A9
A11
CS2#
A10
CS1#
I/O7
I/O6
I/O5
I/O4
I/O3
Pin Conguration FOR WS1M8-XCX
32 DIP
Top View
Block Diagram
A0-18
WE#
512K x 8
CS1#
CS2#
I/O0-7
(1)
Pin Description
A0-18
Address Inputs
I/O0-7
Data Input/Output
CS1-2#
Chip Selects
WE#
Write Enable
VCC
+5.0V Power Supply
GND
Ground
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