- 您現(xiàn)在的位置：買賣IC網 > PDF目錄361922 > WS128K32V-25H1C (Electronic Theatre Controls, Inc.) 128Kx32 3.3V SRAM MULTICHIP PACKAGE PDF資料下載
參數(shù)資料
| 型號： | WS128K32V-25H1C |
| 廠商： | Electronic Theatre Controls, Inc. |
| 元件分類： | SRAM |
| 英文描述： | 128Kx32 3.3V SRAM MULTICHIP PACKAGE |
| 中文描述： | 128Kx32 3.3V的SRAM的多芯片封裝 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 98K |
| 代理商： | WS128K32V-25H1C |
White Microelectronics (602) 437-1520 www.whiteedc.com
4
S
1
WS128K32V-XXX
128Kx32 3.3V SRAM MULTICHIP PACKAGE
PRELIMINARY*
I
3.3 Volt Power Supply
I
Low Power CMOS
I
TTL Compatible Inputs and Outputs
I
Built-in Decoupling Caps and Multiple Ground Pins for Low
Noise Operation
I
Weight
WS128K32V-XG2TX - 8 grams typical
WS128K32V-XG1UX - 5 grams typical
WS128K32V-XH1X - 13 grams typical
*
This data sheet describes a product that is not fully qualified or
characterized and is subject ot change without notice.
** Commercial and Industrial temperature ranges only.
FEATURES
I
Access Times of 15** 17, 20, 25, 35ns
I
Low Voltage Operation
I
Packaging
66-pin, PGA Type, 1.075 inch square Hermetic Ceramic
HIP (Package 400)
68 lead, Hermetic CQFP (G2T), 22.4mm (0.880 inch) square
(Package 509), 4.57mm (0.180 inch) high. Designed to fit
JEDEC 68 lead 0.990" CQFJ footprint (Fig. 2)
68 lead, Hermetic CQFP (G1U), 23.8mm (0.940 inch)
square (Package 509), 3.56mm (0.140 inch) high.
I
Organized as 128Kx32; User Configurable as 256Kx16 or
512Kx8
I
Commercial, Industrial and Military Temperature Ranges
FIG. 1
PIN CONFIGURATION FOR WS128K32NV-XH1X
TOP VIEW
PIN DESCRIPTION
I/O
0-31
Data Inputs/Outputs
A
0-16
Address Inputs
WE
1-4
Write Enables
CS
1-4
Chip Selects
OE
Output Enable
V
CC
Power Supply
GND
Ground
NC
Not Connected
I/O
8
I/O
9
I/O
10
A
13
A
14
A
15
A
16
NC
I/O
0
I/O
1
I/O
2
WE
2
CS
2
GND
I/O
11
A
10
A
11
A
12
V
CC
CS
1
NC
I/O
3
I/O
15
I/O
14
I/O
13
I/O
12
OE
NC
WE
1
I/O
7
I/O
6
I/O
5
I/O
4
I/O
24
I/O
25
I/O
26
A
6
A
7
NC
A
8
A
9
I/O
16
I/O
17
I/O
18
V
CC
CS
4
WE
4
I/O
27
A
3
A
4
A
5
WE
3
CS
3
GND
I/O
19
I/O
31
I/O
30
I/O
29
I/O
28
A
0
A
1
A
2
I/O
23
I/O
22
I/O
21
I/O
20
11 22 33 44 55 66
1 12 23 34 45 56
BLOCK DIAGRAM
128K x 8
8
I/O
0-7
CS
1
1
128K x 8
8
I/O
8-15
2
128K x 8
8
I/O
16-23
3
128K x 8
8
I/O
24-31
4
A
0-16
OE
WE
CS
2
WE
CS
3
WE
CS
4
WE
April 2001 Rev. 2
相關PDF資料 |
PDF描述 |
|---|---|
| WS128K32NV-25H1C | 128Kx32 3.3V SRAM MULTICHIP PACKAGE |
| WS128K32V-25H1CA | 128Kx32 3.3V SRAM MULTICHIP PACKAGE |
| WS128K32NV-25H1CA | 128Kx32 3.3V SRAM MULTICHIP PACKAGE |
| WS128K32V-25H1I | 128Kx32 3.3V SRAM MULTICHIP PACKAGE |
| WS128K32V-25H1IA | 128Kx32 3.3V SRAM MULTICHIP PACKAGE |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| WS128K32V-25H1CA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:128Kx32 3.3V SRAM MULTICHIP PACKAGE |
| WS128K32V-25H1I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:128Kx32 3.3V SRAM MULTICHIP PACKAGE |
| WS128K32V-25H1IA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:128Kx32 3.3V SRAM MULTICHIP PACKAGE |
| WS128K32V-25H1M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:128Kx32 3.3V SRAM MULTICHIP PACKAGE |
| WS128K32V-25H1MA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:128Kx32 3.3V SRAM MULTICHIP PACKAGE |
發(fā)布緊急采購，3分鐘左右您將得到回復。