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參數(shù)資料
| 型號： | WMS128K8L-70CCEA |
| 元件分類： | SRAM |
| 英文描述： | 128K X 8 STANDARD SRAM, 70 ns, CDIP32 |
| 封裝： | 0.600 INCH, CERAMIC, DIP-32 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 107K |
| 代理商： | WMS128K8L-70CCEA |
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
1
HI-RELIABILITY PRODUCT
WMS128K8-XXX
s Commercial, Industrial and Military Temperature Range
s 5 Volt Power Supply
s Low Power CMOS
s 2V Data Retention Devices Available
(Low Power Version)
s TTL Compatible Inputs and Outputs
128Kx8 MONOLITHIC SRAM, SMD 5962-96691 (pending)
FEATURES
s Access Times 70, 85, 100, 120ns
s Revolutionary, Center Power/Ground Pinout
JEDEC Approved
32 lead Ceramic SOJ (Package 101)
s Evolutionary, Corner Power/Ground Pinout
JEDEC Approved
32 pin Ceramic DIP (Package 300)
32 lead Ceramic SOJ (Package 101)
32 lead Ceramic Flat Pack (Package 206)
s MIL-STD-883 Compliant Devices Available
EVOLUTIONARY PINOUT
REVOLUTIONARY PINOUT
A0-16
Address Inputs
I/O 0-7
DataInput/Output
CS
Chip Select
OE
OutputEnable
WE
WriteEnable
VCC
+5.0VPower
GND
Ground
PIN DESCRIPTION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
NC
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
VCC
A15
NC/CS2*
WE
A13
A8
A9
A11
OE
A10
CS
I/O7
I/O6
I/O5
I/O4
I/O3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A0
A1
A2
A3
CS
I/O1
I/O2
VCC
GND
I/O3
I/O4
WE
A4
A5
A6
A7
A16
A15
A14
A13
OE
I/O8
I/O7
GND
VCC
I/O6
I/O5
A12
A11
A10
A9
A8
32 DIP
32 CSOJ (DE)
32 FLATPACK (FE)
TOP VIEW
32 CSOJ (DR)
* NC for single chip select devices
CS2 for dual chip select devices
February 2000 Rev. 2
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| WMS128K8L-70CIE | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| WMS128K8L-70CME | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| WMS128K8L-70DEIE | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| WMS128K8L-70DEME | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| WMS128K8L-70DRIE | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
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