- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄140406 > WEDPNF8M721V-1210BI SPECIALTY MEMORY CIRCUIT, PBGA275 PDF資料下載
參數(shù)資料
| 型號： | WEDPNF8M721V-1210BI |
| 元件分類： | 存儲器 |
| 英文描述： | SPECIALTY MEMORY CIRCUIT, PBGA275 |
| 封裝： | 32 X 25 MM, PLASTIC, BGA-275 |
| 文件頁數(shù)： | 1/42頁 |
| 文件大?。?/td> | 686K |
| 代理商： | WEDPNF8M721V-1210BI |
當(dāng)前第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁
1
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
HI-RELIABILITY PRODUCT
WEDPNF8M721V-XBX
October 2000 Rev. 1
8Mx72 Synchronous DRAM + 8Mb Flash Mixed Module
Multi-Chip Package ADVANCED*
FEATURES
s Package:
275 Plastic Ball Grid Array (PBGA), 32mm x 25mm
s Commercial, Industrial and Military Temperature Ranges
s Weight:
WEDPNF8M721V-XBX - 2.5 grams typical
SDRAM PERFORMANCE FEATURES
s Organized as 8M x 72
s High Frequency = 100, 125MHz
s Single 3.3V
±0.3V power supply
s Fully Synchronous; all signals registered on positive edge of
system clock cycle
s Internal pipelined operation; column address can be changed
every clock cycle
s Internal banks for hiding row access/precharge
s Programmable Burst length 1,2,4,8 or full page
s 4096 refresh cycles
FLASH PERFORMANCE FEATURES
s User Configurable as 1Mx8 or 512Kx16
s Access Times of 100, 120, 150ns
32
25
Discrete Approach
S
A
V
I
N
G
S
Area
5 x 265mm + 54mm = 1379mm 2
2
800mm2
42%
5 x 54 pins + 48 balls = 318 connections
275 balls
14%
ACTUAL SIZE
22.3
11.9
I/O
Count
11.9
48
PBGA
6.0
9.0
Note: Dimensions in millimeters
s 3.3 Volt for Read and Write Operations
s 1,000,000 Erase/Program Cycles
s Sector Architecture
One 16KByte, two 8KBytes, one 32KByte, and fifteen 64KBytes
in byte mode
One 8K word, two 4K words, one 16K word, and fifteen 32K
word sectors in word mode.
Any combination of sectors can be concurrently erased. Also
supports full chip erase
s Boot Code Sector Architecture (Bottom)
s Embedded Erase and Program Algorithms
s Erase Suspend/Resume
Supports reading data from or programing data to a sector
not being erased
BENEFITS
s 42% SPACE SAVINGS
s Reduced part count
s Reduced I/O count
14% I/O Reduction
s Suitable for hi-reliability applications
s SDRAM Upgradeable to 16M x 72 density (contact factory for
information)
s Flash upgradeable to 2M x 8 (or 1M x 16 or 512K x 32) density
* This data sheet describes a product that may or may not be under
development and is subject to change or cancellation without notice.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| WS512K8-20CMA | 512K X 8 MULTI DEVICE SRAM MODULE, 20 ns, DMA32 |
| WS1M8-20DJCA | 1M X 8 STANDARD SRAM, 20 ns, CDSO36 |
| WS1M8-55DJCA | 1M X 8 STANDARD SRAM, 55 ns, CDSO36 |
| WMS128K8-55DJIA | 128K X 8 STANDARD SRAM, 55 ns, CDSO36 |
| W7NCF02GH31CS2AG | 128M X 16 FLASH 3.3V PROM CARD, 150 ns, UUC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| WEDPNF8M721V-1210BM | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8Mx72 Synchronous DRAM + 8Mb Flash Mixed Module Multi-Chip Package |
| WEDPNF8M721V-1212BC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8Mx72 Synchronous DRAM + 8Mb Flash Mixed Module Multi-Chip Package |
| WEDPNF8M721V-1212BI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8Mx72 Synchronous DRAM + 8Mb Flash Mixed Module Multi-Chip Package |
| WEDPNF8M721V-1212BM | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8Mx72 Synchronous DRAM + 8Mb Flash Mixed Module Multi-Chip Package |
| WEDPNF8M721V-1215BC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8Mx72 Synchronous DRAM + 8Mb Flash Mixed Module Multi-Chip Package |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。