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參數(shù)資料
| 型號(hào)： | WED2EG472512V6D2 |
| 廠商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分類： | SRAM |
| 英文描述： | 2M X 72 MULTI DEVICE SRAM MODULE, 3.5 ns, DMA168 |
| 封裝： | DIMM-168 |
| 文件頁數(shù)： | 1/10頁 |
| 文件大?。?/td> | 265K |
| 代理商： | WED2EG472512V6D2 |
1
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WED2EG472512V-D2
Jan, 2000
Rev. A
ADVANCED*
White Electronic Designs Corp. reserves the right to change products or specications without notice.
4x512Kx72 Synchronous Burst
Pipeline Architecture; Dual Cycle Deselect
Linear and Sequential Burst Support via MODE pin
Clock Controlled Registered Module Enable (EM#)
Clock Controlled Registered Bank Enables (E1#,
E2#, E3#, E4#)
Clock Controlled Byte Write Mode Enable (BWE#)
Clock Controlled Byte Write Enables
(BW1#-BW8#)
Clock Controlled Registered Address
Clock Controlled Registered Global Write (GW#)
Asynchronous Output Enable (G#)
Internally Self-Timed Write
Individual Bank Sleep Mode Enables (ZZ1, ZZ2,
ZZ3, ZZ4)
Gold Lead Finish
3.3V ± 10% Operation
Frequency(s): 200, 166, 150 and 133MHZ
Access Apeed(s): tKHQV = 3.0, 3.5, 3.7 and 4.0ns
Common Data I/O
High Capacitance (30pF) Drive, at Rated Access
Speed
Single Total Array Clock
Multiple VCC and GND for Improved Noise Immunity
16MB (4x512Kx72) SYNC BURST PIPELINE,
DUAL KEY DIMM
DESCRIPTION
FEATURES
The WED2EG472512V is a Synchronous/Synchronous
Burst SRAM, 84 position Dual Key; Double High DIMM
(168 contacts) Module, organized as 4x512Kx72. The
Module contains sixteen (16) Synchronous Burst RAM
devices, packaged in the industry standard JEDEC
14mmx20mm TQFP placed on a Multilayer FR4 Substrate.
The Module Architecture is dened as a Sync/SyncBurst,
Pipeline, with support for either linear or sequential burst.
This Module provides high performance, 3-1-1-1 accesses
when used in Burst Mode.
Synchronous Only operations are performed via strapping
ADSC# Low, and ADSP#/ADV# High, which provides for
Ultra Fast Accesses in Read Mode while providing for
internally self-timed Early Writes.
Synchronous/Synchronous Burst operations are in relation
to an externally supplied clock, Registered Address,
Registered Global Write, egistered Enables as well as
an Asynchronous Output Enable. This module has been
dened with full exibility, which allowes individual control
of each of the eight bytes, as well as Quad Words in both
Read and Write Operations.
* This product is under development, is not qualied or characterized and is subject to
change or cancellation without notice.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| WED2EG472512V7D2 | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:16MB (4x512Kx72) SYNC BURST PIPELINE, DUAL KEY DIMM |
| WED2EG472512V-D2 | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:16MB (4x512Kx72) SYNC BURST PIPELINE, DUAL KEY DIMM |
| WED2ZL236512S-BC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:NBL SSRAM MCP |
| WED2ZL361MS | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:1Mx36 Synchronous Pipeline Burst NBL SRAM |
| WED2ZL361MS26BC | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:1Mx36 Synchronous Pipeline Burst NBL SRAM |
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