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參數(shù)資料
| 型號(hào)： | W3DG634V7D2 |
| 廠商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分類： | DRAM |
| 英文描述： | 4M X 64 SYNCHRONOUS DRAM MODULE, DMA168 |
| 封裝： | DIMM-168 |
| 文件頁數(shù)： | 4/6頁 |
| 文件大小： | 117K |
| 代理商： | W3DG634V7D2 |
July 2004
Rev 1
W3DG644V-D2
4
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
White Electronic Designs Corp. reserves the right to change products or specications without notice.
PRELIMINARY
OPERATING CURRENT CHARACTERISTICS
(VCC = 3.3V, 0°C
≤ TA ≤ 70°C)
Notes: 1. Measured with outputs open.
2. Refresh period is 64ms.
Parameters
Symbol
Conditions
Versions
Units
Note
133
100
Operating Current
(One bank active)
ICC1
Burst Length = 1
tRC ≥ tRC(min)
IOL = 0mA
300
mA
1
Precharge Standby Current
in Power Down Mode
ICC2P
CKE ≤ VIL(max), tCC = 10ns
4mA
ICC2PS
CKE & CK ≤ VIL(max), tCC = ∞
4mA
Precharge Standby Current
in Non-Power Down Mode
ICC2N
CKE ≥ VIH(min), CS ≥ VIH(min), tCC =10ns
Input signals are charged one time during 20
48
mA
ICC2NS
CKE ≥ VIH(min), CK ≤ VIL(max), tCC= ∞
Input signals are stable
24
mA
Active standby current in power-
down mode
ICC3P
CKE ≥ VIL(max), tCC = 10ns
8mA
ICC3PS
CKE & CK ≤ VIL(max), tCC = ∞
8
Active standby in current non
power-down mode
ICC3N
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns
Input signals are charged one time during 20ns
80
mA
ICC3NS
CKE ≥ VIH(min), CK ≤ VIL(max), tCC = ∞
input signals are stable
40
mA
Operating current (Burst mode)
ICC4
Io = mA
Page burst
4 Banks activated
tCCD = 2CK
460
mA
1
Refresh current
ICC5
tRC ≥ tRC(min)
360
mA
2
Self refresh current
ICC6
CKE ≤ 0.2V
4mA
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相關(guān)代理商/技術(shù)參數(shù) |
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| W3DG6363V10D2-X | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:512MB - 2x32Mx64 SDRAM UNBUFFERED |
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| W3DG64126V10D2 | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:1GB - 2x64Mx64, SDRAM UNBUFFERED |
| W3DG64126V75D2 | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:1GB - 2x64Mx64, SDRAM UNBUFFERED |
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