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參數(shù)資料
| 型號： | W194-70G |
| 英文描述： | Miscellaneous Clock Generator |
| 中文描述： | 雜項(xiàng)時鐘發(fā)生器 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大?。?/td> | 152K |
| 代理商： | W194-70G |
Frequency Multiplier and Zero Delay Buffer
W194
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
408-943-2600
March 16, 2001. Rev. *C
1W194
Features
Two outputs
Configuration options allow various multiplications of
the reference frequency—refer to
Table 1
to determine
the specific option which meets your multiplication
needs
Available in 8-pin SOIC package
Key Specifications
Operating Voltage: ............................3.3V ±5% or 5.0 ±10%
Operating Range: .......................10 MHz < f
OUT1
< 133 MHz
Absolute Jitter: ......................................................... ±500 ps
Output to Output Skew: .............................................. 250 ps
Propagation Delay:....................................................±350 ps
Propagation delay is affected by input rise time.
Table 1. Configuration Options
FBIN
OUT1
OUT1
OUT1
OUT1
OUT2
OUT2
OUT2
OUT2
FS0
0
1
0
1
0
1
0
1
FS1
0
0
1
1
0
0
1
1
OUT1
2 X REF
4 X REF
REF
8 X REF
4 X REF
8 X REF
2 X REF
16 X REF
OUT2
REF
2 X REF
REF/2
4 X REF
2 X REF
4 X REF
REF
8 X REF
Block Diagram
Pin Configuration
÷Q
FS0
FS1
Reference
Input
FBIN
Phase
Detector
Charge
Pump
Loop
Filter
VCO
÷2
Output
Buffer
OUT1
OUT2
Output
Buffer
External feedback connection to
OUT1 or OUT2, not both
IN
OUT2
VDD
OUT1
FS1
8
7
6
5
FBIN
IN
GND
FS0
1
2
3
4
SOIC
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