參數(shù)資料
型號(hào)： VV5430C001
廠商： 意法半導(dǎo)體
英文描述： Monochrome Analog Output CMOS Image Sensors
中文描述： 單色模擬輸出CMOS圖像傳感器
文件頁數(shù)： 8/33頁
文件大?。?/td> 256K
代理商： VV5430C001
Device Details
VV5430
CD5430F-A
8/33
3.3
Pin List
Pin
Signal
Name
Typ
e
Description
POWER SUPPLIES
1
AVCC
PWR
Core analogue power and reference supplies.
7
AVDD
PWR
Output stage power. AVDD3 output stage logic.
10
AVSS
GND
Output stage ground. AVSS3 output stage logic.
13
VVDD
PWR
75ohm buffer supply.
15
VGND
GND
75ohm buffer ground.
24,31
VSS
GND
Digital padring & logic ground.
27,34
VDD
PWR
Digital padring & logic power.
41
DVDD
PWR
Core digital power.
42
DVSS
GND
Core digital ground.
48
AGND
GND
Core analogue ground and reference supplies.
ANALOGUE VOLTAGE REFERENCES
2
VBG
OA
Internal bandgap reference voltage (1.22V nominal). Requires external 0.1uF
capacitor.
3
VOFF/VPED
IA
Pedestal DAC & offset comp. DAC bias. Connect to VBG or external refer-
ence.
4
DEC2V2
OA
Decouple 2.2V reference. Requires external 0.1uF capacitor.
5
DEC2V7
OA
Decouple 2.7V reference. Requires external 0.1uF capacitor.
6
-
DNC
Do NOT connect - for test use only
8
EBCK
IA
External black level bias. Internally generated. Decouple to VGND
9
EVWT
IA
External white pixel threshold for exposure control. Decouple to VGND
43
VBLWT
IA
Defines white level for clamp circuitry. Requires external 0.1uF capacitor.
44
VBLOOM
OA
Anti-blooming voltage reference. Requires external 0.1uF capacitor.
45
VRT
IA
Pixel reset voltage. Connect to VREF2V7 or external reference.
46
VCM
IA
Offset DAC common mode input. Connect to VREF2V7.
47
VREF2V7
OA
Internally generated 2.7V reference. Requires external 4.7uF capacitor.
ANALOGUE OUTPUTS
14
AVO
OA
Buffered Analogue video out. Can drive a doubly terminated 75ohm load.
SYSTEM CLOCKS
25
CKOUT
OD
Oscillator output. Connect Crystal for standard timing.
26
CKIN
ID
Oscillator input. Connect Crystal for standard timing.
IMAGE CAPTURE TIMING SIGNALS
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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