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參數(shù)資料
| 型號： | VTC1-J15D-17M500 |
| 廠商： | VECTRON INTERNATIONAL |
| 元件分類： | TCVCXO, clock |
| 英文描述： | TCVCXO, CLOCK, 17.5 MHz, CMOS OUTPUT |
| 文件頁數(shù)： | 7/8頁 |
| 文件大?。?/td> | 256K |
| 代理商： | VTC1-J15D-17M500 |
VTC1 Data Sheet
Vectron International 267 Lowell Rd, Hudson NH 03051
Tel: 1-88-VECTRON-1
e-mail vectron@vectron.com
7
Handling Precautions
Although ESD protection circuitry has been designed into the the VTC1, proper precautions should be taken
when handling and mounting. VI employs a Human Body Model and a Charged-Device Model (CDM) for
ESD susceptibility testing and design protection evaluation. ESD thresholds are dependent on the circuit
parameters used to define the model. Although no industry wide standard has been adopted for the CDM, a
standard HBM of resistance = 1.5kohms and capacitance = 100pF is widely used and therefore can be
used for comparison purposes.
Table 7. ESD Ratings
Model
Minimum
Conditions
Human Body Model
1000
MIL-STD-883 Method 3115
Charged Device Model
1500
JESD 22-C101
Suggested IR profile
Devices are built using lead free epoxy and can also be subjected to standard lead free IR reflow conditions,
Table 7 shows max temperatures and lower temperatures can also be used e.g. peak temperature of 220C.
Table 8. Reflow Profile (IPC/JEDEC J-STD-020B)
Parameter
Symbol
Value
PreHeat Time
t S
150 sec Min, 200 sec Max
Ramp Up
R UP
3
oC/sec Max
Time Above 217
oC
t L
60 sec Min, 150 sec Max
Time To Peak Temperature
t AMB-P
480 sec Max
Time At 260
oC (max)
t P
10 sec Max
Time At 240 °C (max)
tp2
60 sec Max
Ramp Down
R DN
6
oC/sec Max
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