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參數(shù)資料
| 型號： | MSM58321RS |
| 廠商： | OKI ELECTRIC INDUSTRY CO LTD |
| 元件分類： | 時鐘/數(shù)據(jù)恢復(fù)及定時提取 |
| 英文描述： | 0 TIMER(S), REAL TIME CLOCK, PDIP16 |
| 封裝： | 0.300 INCH, PLASTIC, DIP-16 |
| 文件頁數(shù)： | 2/16頁 |
| 文件大小： | 121K |
| 代理商： | MSM58321RS |
Semiconductor
MSM58321
16
11
Name
Pin No.
Description
STOP
The STOP pin is used to input on/off control for a 1 Hz signal. When this pin
goes to the H level, 1 Hz signals are inhibited and counting for all digits
succeeding the S1 digit is stopped. When this pin goes to the L level, normal
operations are performed; the digits are counted up. This STOP input controls
stopping digit counting. Writing of external data in digits can be assured by
setting the STOP input to the H level to stop counting, then writing sequentially
from the low-order digits.
The TEST pin is used to test this IC; it is normally open or connected to GND. It
is recommended to connect it to GND to safeguard against malfunctions from
noise.
The TEST pulse can be input to the following nine digits:
S1, S10, MI10, H1, D1 (W), M01, Y1 and Y10
When a TEST pulse is input to the D1 digit, the W digit is also counted up
simultaneously.
Input a TEST pulse as follows:
Set the address to either digit explained above, then input a pulse to the TEST pin
while CS1 = CS2 = STOP = H and WRITE = L. The specified and succeeding digits
are counted up. (See Figure 6)
A digit is counted up at the leading edge (changing point from L to H) of a TEST
pin input pulse. The pulse condition for TEST pin input at VDD = 5V ±5% is
described in Figure 7 below.
Figure 7
TEST
12
1 Hz
0 ~ 9
C1
C10
S1
S10
MI1
TEST-P
TEST
Rp
C-S
S1
S10
MI1
0 ~ 9
0 ~ 6
C0
D1
C1
W
C1
D10
D1
Rp = 200 k
TYP
0 ~ 5
C10
Figure 6
tH
tL
tH = 10 s MIN
tL = 10 s MIN
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