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參數(shù)資料
| 型號(hào)： | VT82C42 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | VT82C42 Keyboard Controller |
| 中文描述： | VT82C42鍵盤(pán)控制器 |
| 文件頁(yè)數(shù)： | 4/13頁(yè) |
| 文件大?。?/td> | 61K |
| 代理商： | VT82C42 |
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VIA Technologies, Inc.
VT82C42
-2-
The host can program the output port (P20-P23 in AT mode, or P20-P21 in PS/2 mode) or in-out port (P10-
P15 in AT mode, or P12-P15 in PS/2 mode) by issuing a command to the command register on the VT82C42.
The controller will then quickly execute the specified command. Note that P16-P17 is implemented as an
input port only. The host can also transmit data to the keyboard and mouse by issuing a command to the data
register. The data coming to the data register (with A0 = 0, CS# = 0, RD# = 1, and WR# = 0) will be sent to
the keyboard via the keyboard serial interfaces. The data sent to the mouse will be completed by 1) issuing a
D4 command to the command register, 2) then writing the following data byte to the data register (to be sent to
the mouse via mouse serial interface). In either case, the VT82C42 will wait for an acknowledgement from the
keyboard or mouse to complete a transmission. At the same time as the completion of the transmission, the
VT82C42 will raise P24 or P25 (when sending data to mouse) to signal the host of a completion of
transmission. When the controller receives or transmits, the controller does a parity and time-out check. If any
error occurs in the interface or inside the external devices (keyboard or mouse), the controller will reflect that
error in the following status register.
A0
CS
IOR
IOW
command
decoder
+
scan
mapping
data input buffer
command register/
data register
data output buffer
status register
arbitration &
central control
unit
timer
X1, X2
D[7:0]
receiving unit
transmtting unit
d
clocking
(8 Mhz)
In/Out
port buffer
KBCK
KBDT
MSCK
MSDT
P[17:10]
P[27:20]
RESET
mode
selector
T1
T0
Fig 1. Block Diagram for VT82C42
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VT82C586A | PIC Integrated Peripheral Controller |
| VT82C586B | PCI INTEGRATED PERIPHERAL CONTROLLER |
| VT82C686A | PCI SUPER-I/O INTEGRATED PERIPHERAL CONTROLLER |
| vt82c693 | APOLLO PRO-PLUS |
| VT8371 | KX133 ATHLON NORTH BRIDGE |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| VT82C586A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PIC Integrated Peripheral Controller |
| VT82C586B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PCI INTEGRATED PERIPHERAL CONTROLLER |
| VT82C596 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MOBILE PCI INTEGRATED PERIPHERAL CONTROLLER |
| VT82C596A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MOBILE PCI INTEGRATED PERIPHERAL CONTROLLER |
| VT82C596B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PCI INTEGRATED PERIPHERAL CONTROLLER |
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