- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄359432 > VSC8169 (VITESSE SEMICONDUCTOR CORP) OC-48 (FEC) 16:1 SONET/SDH MUX with Clock Generator PDF資料下載
參數(shù)資料
| 型號： | VSC8169 |
| 廠商： | VITESSE SEMICONDUCTOR CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | OC-48 (FEC) 16:1 SONET/SDH MUX with Clock Generator |
| 中文描述： | MUX/DEMUX, PQFP128 |
| 封裝： | 14 X 20 MM, HEAT SINK, PLASTIC, QFP-128 |
| 文件頁數(shù)： | 2/18頁 |
| 文件大?。?/td> | 191K |
| 代理商： | VSC8169 |
VITESSE
Preliminary Data Sheet
VSC8169
OC-48 (FEC) 16:1 SONET/SDH
MUX with Clock Generator
Page 2
G52230-0, Rev 3.6
01/02/01
VITESSE
SEMICONDUCTOR CORPORATION
741 Calle Plano
Camarillo, CA 93012
Tel: (800) VITESSE
FAX: (805) 987-5896
Email: prodinfo@vitesse.com
Internet: www.vitesse.com
Functional Description
Low-Speed Interface
The Upstream Device should use the CLK16O as the timing source for its final output latch (see Figure 1).
The Upstream Device should then generate a CLK16I that is phase aligned with the data. The VSC8169 will
latch D[15:0]
±
on the rising edge of CLK16I+. The data must meet setup and hold times with respect to
CLK16I (see Table 2). In addition to the CLK16O clock output, there also exists a utility REFCLKO output sig-
nal, which is a clock with the same rate as that presented at the REFCLK input.
A FIFO exists within the VSC8169 to eliminate difficult system loop timing issues. Once the PLL has
locked to the reference clock, RESET must be held low for a minimum of five CLK16 cycles to initialize the
FIFO, then RESET should be set high and held constant for continuous FIFO operation. For the transparent
mode of operation (no FIFO), simply hold RESET at a constant low state (see Figure 2).
The use of a FIFO permits the system designer to tolerate an arbitrary amount of delay between CLK16O
and CLK16I. Once RESET is asserted and the FIFO initialized, the delay between CLK16O and CLK16I can
decrease or increase up to one period of the low-speed clock (6.4ns). Should this delay drift exceed one period,
the write pointer and the read pointer could point to the same word in the FIFO, resulting in a loss of transmitted
data (a FIFO overflow). In the event of a FIFO overflow, an active low FIFO_WARN signal is asserted (for a
minimum of five CLK16I cycles) which can be used to initiate a reset signal from an external controller.
The CLK16O
±
output driver is a LVPECL output driver designed to drive a 50
transmission line. The
transmission line can be DC terminated with a split-end termination scheme (see Figure 3), or DC terminated by
50
to V
CC
-2V on each line (see Figure 4). At any time, the equivalent split-end termination technique can be
substituted for the traditional 50
to V
CC
-2V on each line. AC-coupling can be achieved by a number of meth-
ods. Figure 5 illustrates an example AC-coupling method for the occasion when the downstream device pro-
vides the bias point for AC-coupling. If the downstream device were to have internal termination, the line to
line 100
resistor may not be necessary.
Figure 1: Low-Speed Systems Interface
REFCLK
2.6GHz
PLL
Divide by 16
CLK16O
x16
16 x 5 FIFO
VSC8169
CLK16I
Upstream
Device
Write
Read
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VSC8171 | SONET/SDH 16:1 Mux with CMU |
| VSC8184 | 11.5-12.5Gb/s 1:16 Demultiplexer with Clock Recovery |
| VSC8211 | Single Port 10/100/1000BASE-T PHY and 1000BASE-X PHY with SGMII, SerDes, GMII, MII, TBI, RGMII / RTBI MAC Interfaces |
| VSC8221 | Single Port 10/100/1000BASE-T PHY with 1.25 Gbps SerDes / SGMII for SFPs / GBICs |
| VSC8228 | Dual Channel Multirate Signal Conditioner and Retimer |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| VSC8169QR | 制造商:VITESSE 制造商全稱:Vitesse Semiconductor Corporation 功能描述:OC-48 (FEC) 16:1 SONET/SDH MUX with Clock Generator |
| VSC8171 | 制造商:VITESSE 制造商全稱:Vitesse Semiconductor Corporation 功能描述:SONET/SDH 16:1 Mux with CMU |
| VSC8172 | 制造商:VITESSE 制造商全稱:Vitesse Semiconductor Corporation 功能描述:SONET/SDH 16:1 Mux with CMU |
| VSC8184 | 制造商:VITESSE 制造商全稱:Vitesse Semiconductor Corporation 功能描述:11.5-12.5Gb/s 1:16 Demultiplexer with Clock Recovery |
| VSC8184UT | 制造商:Vitesse Semiconductor Corporation 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。