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參數資料
| 型號： | VSC7121 |
| 廠商： | Vitesse Semiconductor Corporation. |
| 英文描述： | Quad Port Bypass Circuit for 1.0625 Gbit/sec Fibre Channel Arbitrated Loop Disk Arrays |
| 中文描述： | 四端口旁路電路1.0625 Gbit / sec光纖通道仲裁環(huán)路磁盤陣列 |
| 文件頁數： | 1/12頁 |
| 文件大?。?/td> | 77K |
| 代理商： | VSC7121 |
VITESSE
SEMICONDUCTOR CORPORATION
Page 1
8/31/98
741 Calle Plano, Camarillo, CA 93012 805/388-3700 FAX: 805/987-5896
VITESSE
Data Sheet
VSC7121
Quad Port Bypass Circuit for 1.0625 Gbit/sec
Fibre Channel Arbitrated Loop Disk Arrays
G52110-0, Rev. 4.1
Description
The VSC7121 is a Quad Port Bypass Circuit (PBC). Four Fibre Channel PBC’s are cascaded into a single
part to minimize part count, cost, high frequency routing, and jitter accumulation. Port Bypass Circuits are used
to provide resiliency in Fibre Channel Arbitrated Loop (FC-AL) architectures. PBC’s are used within FC-AL
disk arrays to allow for resiliency and hot swapping of FC-AL drives.
A Port Bypass Circuit is a 2:1 Multiplexer with two modes of operation: NORMAL and BYPASS. In NOR-
MAL mode, the disk drive is connected to the loop. Data goes from the 7121’s L_SOn pin to the Disk Drive RX
input and data from the disk drive TX output goes to the 7121’s L_SIn pin. Refer to Figure 2 for disk drive
application. In BYPASS mode, the disk drive is either absent or non-functional and data bypasses to the next
available disk drive. Normal mode is enabled with a HIGH on the SEL pin and BYPASS mode is enabled by a
LOW on the SEL pin. Direct Attach Fibre Channel Disk Drives have an “LRC Interlock” signal defined to con-
trol the SEL function.
Using a VSC7121 in a single loop of a disk array is illustrated in Figure 2: “Disk Array Application”. FC-
AL drives are all expected to be dual loop. The VSC7121 is cascaded in a manner such that all the 7121’s inter-
nal PBC’s are used in the same loop. For dual loop implementations, two or more VSC7121’s should be used.
Allocating each VSC7121 to only one of two loops preserves redundancy, prevents a single point of failure and
lends itself to on-line maintainability.
7121 Block Diagram
The VSC7121 can be cascaded through the IN and OUT pins for arrays of disk drives greater than 4. For
disk arrays with a noninteger multiple of 4 disk drives, the unused PBC’s can be hardwired to bypass with a
external pulldown resistor.
Supports ANSI X3T11 1.0625 Gbit/sec
FC-AL Disk Attach for Resiliency
Fully Differential for Minimum
Jitter Accumulation.
Quad PBC’s in Single Package
TTL Bypass Select
High Speed, PECL I/O’s Referenced to V
DD
.
0.5W Typical Power Dissipation
3.3V Power Supply
44-Pin, 10mm PQFP
L
L
L
L
IN+
IN-
OUT+
OUT-
S
L
L
L
L
S
L
L
L
L
S
L
L
L
L
S
1
0
0
1
0
1
0
1
PBC1
PBC2
PBC3
PBC4
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| VSC7121QM | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Fiber-Optic Port Bypass |
| VSC7122 | 制造商:VITESSE 制造商全稱:Vitesse Semiconductor Corporation 功能描述:Quad Port Bypass Circuit for 1.0625 Gbit/sec Fibre Channel Arbitrated Loop Disk Arrays |
| VSC7122QM | 制造商:VITESSE 制造商全稱:Vitesse Semiconductor Corporation 功能描述:Quad Port Bypass Circuit for 1.0625 Gbit/sec Fibre Channel Arbitrated Loop Disk Arrays |
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| VSC7123QN | 制造商:VITE 功能描述: |
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