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參數(shù)資料
| 型號(hào)： | VS28F016SA |
| 廠商： | Intel Corp. |
| 英文描述： | 16-Mbit (1 Mbit x 16) FlashFile Memory(16-M位(1 M位 x 16) FlashFile 存儲(chǔ)器) |
| 中文描述： | 16兆位（1兆位× 16）FlashFile內(nèi)存（16米位（1米位× 16）FlashFile存儲(chǔ)器） |
| 文件頁數(shù)： | 12/17頁 |
| 文件大?。?/td> | 94K |
| 代理商： | VS28F016SA |
AP-645
E
12
The status register structure is different between the
SA/SV and S3/S5. Because of this change, some
commands are no longer used on the S3/S5. The Read
eXtended Status Registers command (71H) has been
deleted. However, an eXtended Status Register (XSR)
and Block Status Register (BSR) do exist. The XSR is
automatically polled by the S3/S5 when a Write to
Buffer command is issued. The BSR can be read from
address 02H within each block by using the Read Query
command. In addition, the Upload Status Bits command
(97H), which was used to update status in the SA/SV’s
BSR and GSR, is no longer necessary. See Section 4.6
for more information on status registers.
The Read Page Buffer (75H) and Page Buffer Swap
(72H) commands are not available on the S3/S5. The
page buffer cannot be read on the S3/S5, and there is no
manual page buffer swap. The SA/SV’s Single Load to
Page Buffer, Sequential Load to Page buffer and Page
Buffer Write to Flash commands have all been replaced
by the Write to Buffer and Confirm commands on the
S3/S5.
In addition, the Upload Device Information command
(99H) on the SA/SV wrote information into the page
buffers including the Device Revision Number
(28F016SA and 28F016SV), Device Proliferation Code
(28F016SV only), and Device Configuration Code
(28F016SV only). This command is not available on the
S3/S5, however, similar types of information can be
found in the query database. See Section 4.4.1 and the
datasheets for more information on the query database.
The Two-Byte Program command (FBH) is not
available on the S3/S5.
The Abort command (80H) does not exist on the S3/S5.
A Write to Buffer command can be aborted by issuing
an address outside of the current block address. Other
operations can be aborted by bringing RP# low.
The Sleep command (F0H) is not supported on the
S3/S5. The device does not have a sleep mode like the
SA/SV.
4.5
Command Queuing
There is no command queuing on the S3/S5. However,
CFI supports command queuing, and the Block Erase
flowchart in the S3/S5 datasheet contains the steps
necessary to incorporate command queuing on future
devices. Applications which use command queuing on
the SA/SV will have to use software to account for the
lack of command queuing on the S3/S5. Software which
previously took advantage of the command queuing
capability of the SA/SV can be updated by polling for
SR.7 = 1 (WSM ready) before issuing any new
commands to the Command User Interface (CUI). An
alternative is to create new software which does not
incorporate command queuing.
4.6
Status Registers
The SA/SV devices have a Compatible Status Register
(CSR), Global Status Register (GSR) and 32 Block
Status Registers (BSRs). Most of the information
reflected in these three status registers has been
compressed into a single status register (SR) on the
S3/S5. The 28F160/320, S3/S5 status register has the
same structure as the 28F008/016, S3/S5 status register.
The S3/S5 has two additional status registers: the Block
Status Register (BSR) and the eXtended Status Register
(XSR). The S3/S5’s BSR, unlike the SA/SV’s BSR, is
included in the CFI information and can be accessed by
using the Read Query command. The S3/S5’s XSR is
accessed when a Write to Buffer command is issued.
Devices which incorporate CFI erase queuing access the
XSR during queued erase operations. The device
accesses the XSR automatically in both cases.
Table 8. STS and RY/BY# Configurations
S3/S5 (STS)
Configuration
28F016SA (RY/BY#)
28F016SV (RY/BY#)
Level Mode RY/BY# (default mode)
Pulse on Erase Complete
Pulse on Program Complete
Pulse on Erase or Program Complete
Disable
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VS28F016SV | 16-Mbit(1MBitx16) FLASHFILE MEMORY(16M位FLASHFILE存儲(chǔ)器) |
| VS50B-12 | External Plug-In Power Supply; Series:; Output Voltage:18V; Output Power Max:30W; Output Current:1.67A; No. of Outputs:1; Leaded Process Compatible:Yes; Peak Reflow Compatible (260 C):Yes; Power Supply Efficiency:85% RoHS Compliant: Yes |
| VS601JD | Interface IC |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| VS28F016SV | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:16-Mbit (1-Mbit x 16, 2-Mbit x 8) FlashFileTM MEMORY |
| VS291 | 制造商:Aten International 功能描述: |
| VS299 | 制造商:Alarm Suppliers 功能描述: |
| VS2AN5CV15Q-72332 | 制造商:Banner Engineering 功能描述:VS2AN5CV15Q-72332 3 PIN PICO 600mm RIGHT ANGLE M8 NPN Light Operate |
| VS2AN5CV30 | 制造商:Banner Engineering 功能描述:Photoelectric, Convergent, In: 10-30VDC, Out: Light Operate-NPN, 1.2" Range, 2m 制造商:Banner Engineering 功能描述:PHOTOELECTRIC SENSOR, Sensing Range Max:30mm, Output Current:50mA, Sensor Output:NPN, Supply Voltage DC Min:10V, Supply Voltage DC Max:30V, Contact Current Max:50mA, Leaded Process Compatible:No, Peak Reflow Compatible (260 C):No , RoHS Compliant: Yes |
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