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參數(shù)資料
| 型號： | V62C5181024L-35TI |
| 廠商： | Mosel Vitelic, Corp. |
| 英文描述： | 128K x 8 Static RAM |
| 中文描述： | 128K的× 8靜態(tài)RAM |
| 文件頁數(shù)： | 1/12頁 |
| 文件大?。?/td> | 59K |
| 代理商： | V62C5181024L-35TI |
MOSEL VITELIC
1
V62C5181024
128K X 8 STATIC RAM
PRELIMINARY
V62C5181024 Rev. 2.2 February 2000
Features
I
High-speed: 35, 70 ns
I
Ultra low DC operating current of 5mA (max.)
TTL Standby: 5 mA (Max.)
CMOS Standby: 60
I
Fully static operation
I
All inputs and outputs directly compatible
I
Three state outputs
I
Ultra low data retention current (V
I
Single 5V
±
10% Power Supply
μ
A (Max.)
CC
= 2V)
I
Packages
– 32-pin TSOP (Standard)
– 32-pin 600 mil PDIP
– 32-pin 440 mil SOP (525 mil pin-to-pin)
Description
The V62C5181024 is a 1,048,576-bit static
random-access memory organized as 131,072
words by 8 bits. It is built with MOSEL VITELIC’s
high performance CMOS process. Inputs and
three-state outputs are TTL compatible and allow
for direct interfacing with common system bus
structures.
Device Usage Chart
Operating
Temperature
Range
Package Outline
Access Time (ns)
Power
Temperature
Mark
T
W
P
35
70
L
LL
0
°
C to 70
°
C
Blank
–40
°
C to +85
°
C
I
Functional Block Diagram
Row
Decoder
1024 x 1024
Memory Array
Input
Data
Circuit
Column I/O
Column Decoder
Control
Circuit
V
CC
GND
A
0
5181024 01
A
9
I/O
0
I/O
7
CE
2
OE
WE
CE
1
A
10
A
16
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| V62C5181024L-35W | 128K x 8 Static RAM |
| V62C5181024L-35WI | 128K x 8 Static RAM |
| V62C5181024L-70P | 128K x 8 Static RAM |
| V62C5181024L-70PI | 128K x 8 Static RAM |
| V62C5181024L-70T | 128K x 8 Static RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| V62C5181024L-35W | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:128K X 8 STATIC RAM |
| V62C5181024L-35WI | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:128K X 8 STATIC RAM |
| V62C5181024L-70P | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:128K X 8 STATIC RAM |
| V62C5181024L-70PI | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:128K X 8 STATIC RAM |
| V62C5181024L-70T | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:128K X 8 STATIC RAM |
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