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參數(shù)資料
| 型號(hào)： | V62C3802048L-35T |
| 廠商： | Mosel Vitelic, Corp. |
| 元件分類： | SRAM |
| 英文描述： | Ultra Low Power 256K x 8 CMOS SRAM |
| 中文描述： | 超低功耗256K × 8 CMOS SRAM的 |
| 文件頁數(shù)： | 1/12頁 |
| 文件大小： | 102K |
| 代理商： | V62C3802048L-35T |
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WE
CE
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Vcc
A17
A
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CE1
I/O
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I/O
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I/O
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I/O
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I/O
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GND
I/O
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I/O
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I/O
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A
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10
OE
Cell Array
R
S
INPUT BUFFER
COLUMN DECODER
CONTROL
CIRCUIT
I/O8
I/O1
OE
WE
CE1
CE2
A
8
A9
A
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A
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A
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A
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V 62C3802048L(L)
Ultra Low Power
256K x 8 CMOS SRAM
Features
Low-power consumption
- Active: 40mA at 35ns
- Stand-by: 10
μ
A
(CMOS input/output)
2
μ
A
CMOS input/output, L version
Single + 2.7 to 3.3V Power Supply
Equal access and cycle time
35/45/55/70/85/100 ns access time
Easy memory expansion with CE1, CE2
and OE inputs
1.0V data retention mode
TTL compatible, Tri-state input/output
Automatic power-down when deselected
Package available: 32-TSOP1 / STSOP
48 Ball CSP_BGA
Functional Description
The V62C3802048L is a low power CMOS Static RAM orga-
nized as 262,144 words by 8 bits. Easy memory expansion is p-
rovided by an active LOW CE1, an active HIGH CE2, an acti-
ve LOW OE, and Tri-state I/O’s. This device has an autom-
atic power-down mode feature when deselected.
Writing to the device is accomplished by taking Chip En-
able 1 (CE1) with Write Enable (WE) LOW, and Chip Enab-
le 2 (CE2) HIGH. Reading from the device is performed by
taking Chip Enable 1 (CE1) with Output Enable (OE)
LOW while Write Enable (WE ) and Chip Enable 2 (CE2)
is HIGH. The I/O pins are placed in a high-impedance sta-
te when the device is deselected: the outputs are disabled d-
uring a write cycle.
The V62C3802048LL comes with a 1V data retention feature
and Lower Standby Power. The V62C3802048L is available in
a 32-pin 8 x 20 mm TSOP1/8 x 13.4mm STSOP and CSP type
48-fpBGA packages.
32-Pin TSOP1 / STSOP(CSP_BGA see next page)
Logic Block Diagram
REV. 1.
2
May
2001 V62C
380
20
48
L(L)
1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| V62C3802048L-35V | Ultra Low Power 256K x 8 CMOS SRAM |
| V62C3802048L-45T | Ultra Low Power 256K x 8 CMOS SRAM |
| V62C3802048L-45V | Ultra Low Power 256K x 8 CMOS SRAM |
| V62C3802048L-55T | Ultra Low Power 256K x 8 CMOS SRAM |
| V62C3802048L-55V | Ultra Low Power 256K x 8 CMOS SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| V62C3802048L-35V | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:Ultra Low Power 256K x 8 CMOS SRAM |
| V62C3802048L-45T | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:Ultra Low Power 256K x 8 CMOS SRAM |
| V62C3802048L-45V | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:Ultra Low Power 256K x 8 CMOS SRAM |
| V62C3802048L-55T | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:Ultra Low Power 256K x 8 CMOS SRAM |
| V62C3802048L-55V | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:Ultra Low Power 256K x 8 CMOS SRAM |
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