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參數(shù)資料
| 型號： | V62/04634-01 |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PDSO14 |
| 封裝： | SO-14 |
| 文件頁數(shù)： | 12/12頁 |
| 文件大?。?/td> | 433K |
| 代理商： | V62/04634-01 |
Application Hints
20090503
FIGURE 2. LM1815EP Oscillograms
INPUT VOLTAGE CLAMP
The signal input voltage at pin 3 is internally clamped. Current
limit for the Input pin is provided by an external resistor which
should be selected to allow a peak current of ±3 mA in normal
operation. Positive inputs are clamped by a 1k
resistor and
series diode (see R4 and Q12 in the internal schematic dia-
gram), while an active clamp limits pin 3 to typically 350mV
below Ground for negative inputs (see R2, R3, Q10, and Q11
in the internal schematic diagram). Thus for input signal tran-
sitions that are more than 350mV below Ground, the input pin
current (up to 3mA) will be pulled from the V+ supply. If the V
+ pin is not adequately bypassed the resulting voltage ripple
at the V+ pin will disrupt normal device operation. Likewise,
for input signal transitions that are more than 500mV above
Ground, the input pin current will be dumped to Ground
through device pin 2. Slight shifts in the Ground potential at
device pin 2, due to poor grounding techniques relative to the
input signal ground, can cause unreliable operation. As al-
ways, adequate device grounding, and V+ bypassing, needs
to be considered across the entire input voltage and frequen-
cy range for the intended application.
INPUT CURRENT LIMITING
As stated earlier, current limiting for the Input pin is provided
by a user supplied external resistor. For purposes of selecting
the appropriate resistor value the Input pin should be consid-
ered to be a zero ohm connection to ground. For applications
where the input voltage signal is not symmetrical with rela-
tionship to Ground the worst case voltage peak should be
used.
Minimum Rext = [(Vin peak)/3mA]
In the application example shown in figure 1 (Rext = 18k
)
the recommended maximum input signal voltage is ±54V (i.e.
108Vp-p).
OPERATION OF ZERO CROSSING DETECTOR
The LM1815EP is designed to operate as a zero crossing
detector, triggering an internal one shot on the negative-going
edge of the input signal. Unlike other zero crossing detectors,
the LM1815EP cannot be triggered until the input signal has
crossed an "arming" threshold on the positive-going portion
of the waveform. The arming circuit is reset when the chip is
triggered, and subsequent zero crossings are ignored until
the arming threshold is exceeded again. This threshold varies
depending on the connection at pin 5. Three different modes
of operation are possible:
MODE 1, PIN 5 OPEN
The adaptive mode is selected by leaving device pin 5 open
circuit. For input signals of less than ±135mV (i.e. 270 mVp-
p) and greater than typically ±75mV (i.e. 150mVp-p), the input
arming threshold is typically at 45mV. Under these conditions
the input signal must first cross the 45mV threshold in the
positive direction to arm the zero crossing detector, and then
cross zero in the negative direction to trigger it.
If the signal is less than 30mV peak (minimum rating in Elec-
trical Characteristics), the one shot is guaranteed to not trig-
ger.
Input signals of greater than ±230mV (i.e. 460 mVp-p) will
cause the arming threshold to track at 80% of the peak input
voltage. A peak detector capacitor at device pin 7 stores a
value relative to the positive input peaks to establish the arm-
ing threshold. Input signals must exceed this threshold in the
positive direction to arm the zero crossing detector, which can
then be triggered by a negative-going zero crossing.
The peak detector tracks rapidly as the input signal amplitude
increases, and decays by virtue of the resistor connected ex-
ternally at pin 7 track decreases in the input signal.
If the input signal amplitude falls faster than the voltage stored
on the peak detector capacitor there may be a loss of output
signal until the capacitor voltage has decayed to an appro-
priate level.
Note that since the input voltage is clamped, the waveform
observed at pin 3 is not identical to the waveform observed at
the variable reluctance sensor. Similarly, the voltage stored
at pin 7 is not identical to the peak voltage appearing at pin 3.
MODE 2, PIN 5 CONNECTED TO V+
The input arming threshold is fixed at 200mV minimum when
device pin 5 is connected to the positive supply. The chip has
no output for signals of less than ±200 mV (i.e. 400mVp-p)
9
www.national.com
200905 Version 2 Revision 1
Print Date/Time: 2010/07/23 13:58:32
LM1815EP
Enhanced
Plastic
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