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參數(shù)資料
| 型號： | V61C3181024 |
| 廠商： | Mosel Vitelic, Corp. |
| 英文描述： | 128K X 8 HIGH SPEED STATIC RAM |
| 中文描述： | 128K的乘八高速靜態(tài)RAM |
| 文件頁數(shù)： | 1/10頁 |
| 文件大?。?/td> | 77K |
| 代理商： | V61C3181024 |
MOSEL V ITELIC
1
V61C3181024
128K X 8 HIGH SPEED
STATIC RAM
PRELIMINARY
V61C3181024 Rev. 1.3 February 1999
Features
I
High-speed: 10, 12, 15 ns
I
Fully static operation
I
All inputs and outputs directly TTL compatible
I
Three state outputs
I
Low data retention current (V
I
Single 3.3V
±
0.3 Power Supply
I
Low CMOS Standby current of 5 mA max
CC
= 2V)
I
Packages
– 32-pin TSOP
– 32-pin 300 mil SOJ
Description
The V61C3181024 is a 1,048,576-bit static
random-access memory organized as 131,072
words by 8 bits. Inputs and three-state outputs are
TTL compatible and allow for direct interfacing
with common system bus structures. The
V61C3181024 is available in 32-pin SOJ and
TSOP.
Device Usage Chart
Operating
Temperature
Range
Package Outline
Access Time (ns)
Temperature
Mark
T
R
10
12
15
0
°
C to 70
°
C
Blank
Functional Block Diagram
Row
Decoder
Memory Array
Input
Data
Circuit
Column I/O
Column Decoder
Control
Circuit
V
CC
GND
A
0
3181024 01
A
8
I/O
0
I/O
7
CE
2
OE
WE
CE
1
A
9
A
16
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