參數(shù)資料
型號: V59C1512408QALF3E
廠商: PROMOS TECHNOLOGIES INC
元件分類: DRAM
英文描述: 128M X 4 DDR DRAM, BGA68
封裝: ROHS COMPLIANT, FBGA-68
文件頁數(shù): 58/79頁
文件大?。?/td> 1028K
代理商: V59C1512408QALF3E
61
ProMOS TECHNOLOGIES
V59C1G01(408/808/168)QA
V59C1G01(408/808/168)QA Rev. 1.3 June 2008
Overshoot and Undershoot Specification
AC Overshoot / Undershoot Specification for Address and Control Pins
AC Overshoot / Undershoot Specification for Clock, Data, Strobe and Mask Pins
Parameter
DDR2
-667
Units
Maximum peak amplitude allowed for overshoot area
0.9
V
Maximum peak amplitude allowed for undershoot area
0.9
V
Maximum overshoot area above VDD
0.80
V.ns
Maximum undershoot area below VSS
0. 80
V.ns
Parameter
DDR2
-667
Units
Maximum peak amplitude allowed for overshoot area
0.5
V
Maximum peak amplitude allowed for undershoot area
0.5
V
Maximum overshoot area above VDDQ
0.23
V.ns
Maximum undershoot area below VSSQ
0. 23
V.ns
VDD
VSS
Overshoot Area
Undershoot Area
Maximum Amplitude
Time (ns)
Vo
lt
s
(
V
)
VDDQ
VSSQ
Overshoot Area
Undershoot Area
Maximum Amplitude
Time (ns)
Vo
lt
s
(
V
)
DDR2
-800
0.66
0. 66
-800
0.23
0. 23
-1066
0.5 (0.9)
0.19
1
0.5 (0.9)
1
DDR2
-1066
0.5
Note 1 The maximum requirements for peak amplitude were reduced from 0.9V to 0.5V. Register vendor datasheet will specifiy the
maximum over/undershoot induced in specific RDIMM applications. DRAM vendor datasheet will also specify the maximum oversh-
oot/undershoot that their DRAM can tolerate. This will allow the RDIMM supplier to understand whether the DRAM can tolerate the
overshoot that the register will induce in the specific RDIMM application.
相關PDF資料
PDF描述
V59C1512408QALP25A 128M X 4 DDR DRAM, PBGA68
V59C1512408QAUJ37H 128M X 4 DDR DRAM, PBGA68
V59C1G01808QBLF-19A DDR DRAM, PBGA68
V5F110BB3 SNAP ACTING/LIMIT SWITCH, SPDT, MOMENTARY, 0.5A, 125VDC, 2.4mm, PANEL MOUNT
V62/07602-02XE 1-OUTPUT THREE TERM VOLTAGE REFERENCE, 2.5 V, PDSO6
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