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參數(shù)資料
| 型號： | V53C518160A |
| 廠商： | Mosel Vitelic, Corp. |
| 英文描述： | 1M x 16 Fast Page Mode CMOS Dynamic RAM(1Mx16快速頁面模式CMOS動(dòng)態(tài)RAM) |
| 中文描述： | 100萬× 16快速頁面模式的CMOS動(dòng)態(tài)RAM（1Mx16快速頁面模式的CMOS動(dòng)態(tài)內(nèi)存） |
| 文件頁數(shù)： | 1/28頁 |
| 文件大?。?/td> | 179K |
| 代理商： | V53C518160A |
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MOSEL V ITELIC
1
V53C518160A
1M x 16 FAST PAGE MODE
CMOS DYNAMIC RAM
V53C518160A Rev. 1.3 March 1998
HIGH PERFORMANCE
50
60
Max. RAS Access Time, (t
RAC
)
50 ns
60 ns
Max. Column Address Access Time, (t
CAA
)
25 ns
30 ns
Min. Fast Page Mode Cycle Time, (t
PC
)
35 ns
40 ns
Min. Read/Write Cycle Time, (t
RC
)
90 ns
110 ns
Features
I
1MB x 16-bit organization
I
Fast Page Mode for a sustained data rate
of 29 MHz
I
RAS access time: 50, 60 ns
I
Dual CAS Inputs
I
Low power dissipation
I
Read-Modify-Write, RAS-Only Refresh,
CAS-Before-RAS Refresh, Self Refresh
Refresh Interval: 1024 cycles/16 ms
I
Available in 42-pin 400 mil SOJ and
44/50-pin 400 mil TSOP-II Packages
I
Single 5V
±
10% Power Supply
I
TTL Interface
Description
The V53C518160A is a 1048576 x 16 bit high-
performance CMOS dynamic random access
memory. The V53C518160A offers Fast Page
mode operation. The V53C518160A has symmet-
ric address, 10-bit row and 10-bit column.
All inputs are TTL compatible. Fast Page Mode
operation allows random access up to 1024 x 16
bits, within a page, with cycle times as short as
35ns.
These features make the V53C518160A ideally
suited for a wide variety of high performance com-
puter systems and peripheral applications.
Device Usage Chart
Operating
Temperature
Range
Package Outline
Access Time (ns)
Power
Temperature
Mark
K
T
50
60
Std.
0
°
C to 70
°
C
Blank
–40
°
C to +85
°
C
I
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