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參數(shù)資料
| 型號(hào)： | UT62256CLS-35L |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 32K X 8 BIT LOW POWER CMOS SRAM |
| 中文描述： | 32K的× 8位低功耗CMOS SRAM |
| 文件頁(yè)數(shù)： | 1/12頁(yè) |
| 文件大?。?/td> | 162K |
| 代理商： | UT62256CLS-35L |
UTRON
UT62256C
32K X 8 BIT LOW POWER CMOS SRAM
Rev. 1.0
FEATURES
Access time : 35/70ns (max.)
Low power consumption:
Operating : 40/30 mA (typical.)
Standby : 3mA (typical) normal
2uA (typical) L-version
1uA (typical) LL-version
Single 5V power supply
All inputs and outputs are TTL compatible
Fully static operation
Three state outputs
Data retention voltage : 2V (min.)
Package : 28-pin 600 mil PDIP
28-pin 330 mil SOP
28-pin 8mmx13.4mm STSOP
FUNCTIONAL BLOCK DIAGRAM
A4
____________________________________________________________________________________________
UTRON TECHNOLOGY INC. P80027
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
1
A3
512 ROWS × 512 COLUMNS
COLUMN I/O
COLUMN DECODER
ROW
DECODER
I/O
CONTROL
LOGIC
CONTROL
I/O1
.
VSS
VCC
WE
OE
PIN DESCRIPTION
SYMBOL
A0 - A14
I/O1 - I/O8
CE
WE
OE
V
CC
V
SS
CE
I/O8
.
.
.
.
. .
.
A14
A13
A12
A7
A6
A5
A8
A9
A2 A1 A0
A10
.
MEMORY ARRAY
A11
A13
WE
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Enable Input
Write Enable Input
Output Enable Input
Power Supply
Ground
GENERAL DESCRIPTION
The UT62256C is a 262,144-bit low power
CMOS static random access memory
organized as 32,768 words by 8 bits. It is
fabricated using high performance, high
reliability CMOS technology.
The UT62256C is designed for high-speed
and low power application. It is particularly
well suited for battery back-up nonvolatile
memory application.
The UT62256C operates from a single 5V
power supply and all inputs and outputs are
fully TTL compatible
PIN CONFIGURATION
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
Vcc
A8
A9
A11
A10
I/O8
I/O7
I/O6
I/O5
I/O4
I/O3
Vss
U
PDIP/SOP
28
14
13
12
11
10
9
8
7
6
5
4
3
2
1
17
16
15
20
19
18
22
23
24
25
26
27
21
CE
WE
OE
A13
A14
I/O4
A11
A9
A8
I/O3
A10
A14
A12
A7
A6
A5
Vcc
I/O8
I/O7
I/O6
I/O5
Vss
I/O2
I/O1
A0
A1
A2
A4
A3
UT62256C
STSOP
28
14
13
12
11
10
9
8
7
6
5
4
3
2
1
17
16
15
20
19
18
22
23
24
25
26
27
21
OE
CE
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| UT62256CLS-35LL | 32K X 8 BIT LOW POWER CMOS SRAM |
| UT62256CLS-70L | 32K X 8 BIT LOW POWER CMOS SRAM |
| UT6264B | 8K X 8 BIT LOW POWER CMOS SRAM |
| UT6264BPC-70 | 8K X 8 BIT LOW POWER CMOS SRAM |
| UT6264BPC-70L | 8K X 8 BIT LOW POWER CMOS SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UT62256CLS-35LL | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32K X 8 BIT LOW POWER CMOS SRAM |
| UT62256CLS-70L | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32K X 8 BIT LOW POWER CMOS SRAM |
| UT62256CLS-70LL | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32K X 8 BIT LOW POWER CMOS SRAM |
| UT62256CPC-70 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32K X 8 BIT LOW POWER CMOS SRAM |
| UT62256CPC-70L | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32K X 8 BIT LOW POWER CMOS SRAM |
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