參數(shù)資料
型號: UPD78F9212GR-JJG-A
廠商: Renesas Electronics America
文件頁數(shù): 122/175頁
文件大小: 0K
描述: MCU 8BIT 4KB FLASH MEM 16-SSOP
標準包裝: 1
系列: 78K0S/Kx1+
核心處理器: 78K0S
芯體尺寸: 8-位
速度: 10MHz
外圍設備: LVD,POR,PWM,WDT
輸入/輸出數(shù): 13
程序存儲器容量: 4KB(4K x 8)
程序存儲器類型: 閃存
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 5.5 V
數(shù)據(jù)轉換器: A/D 4x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 16-SSOP(0.173",4.40mm 寬)
包裝: 托盤
其它名稱: 972-1046
UPD78F9212GR-JJG-A-ND
CHAPTER 3 CPU ARCHITECTURE
User’s Manual U16994EJ6V0UD
48
3.3.2 Immediate addressing
[Function]
Immediate data in the instruction word is transferred to the program counter (PC) to branch.
This function is carried out when the CALL !addr16 and BR !addr16 instructions are executed.
CALL !addr16 and BR !addr16 instructions can be used to branch to all the memory spaces.
[Illustration]
In case of CALL !addr16 and BR !addr16 instructions
15
0
PC
87
70
CALL or BR
Low addr.
High addr.
PC
PC+1
PC+2
3.3.3 Table indirect addressing
[Function]
The table contents (branch destination address) of the particular location to be addressed by the immediate data
of an instruction code from bit 1 to bit 5 are transferred to the program counter (PC) to branch.
Table indirect addressing is carried out when the CALLT [addr5] instruction is executed. This instruction can be
used to branch to all the memory spaces according to the address stored in the memory table 40H to 7FH.
[Illustration]
15
1
15
0
PC
70
Low addr.
High addr.
Memory (Table)
Effective address + 1
Effective address
01
00000000
87
65
0
01
76
5
1
0
ta4–0
Instruction code
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