參數(shù)資料
型號(hào): UPD78F0534FC(T)-AA1-A
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 20 MHz, MICROCONTROLLER, PBGA64
封裝: 5 X 5 MM, LEAD FREE, PLASTIC, FLGA-64
文件頁(yè)數(shù): 36/52頁(yè)
文件大小: 3774K
代理商: UPD78F0534FC(T)-AA1-A
CHAPTER 2 PIN FUNCTIONS
Preliminary User’s Manual U17260EJ3V1UD
41
2.2.11 P140, P141 (port 14)
P140 and P141 function as a 2-bit I/O port. These pins also function as external interrupt request input, clock
output, buzzer output.
The following operation modes can be specified in 1-bit units.
(1) Port mode
P140 and P141 function as a 2-bit I/O port. P140 and P141 can be set to input or output port in 1-bit units using
port mode register 14 (PM14). Use of an on-chip pull-up resistor can be specified by pull-up resistor option
register 14 (PU14).
(2) Control mode
P140 and P141 function as external interrupt request input, clock output, buzzer output.
(a) INTP6, INTP7
These are the external interrupt request input pins for which the valid edge (rising edge, falling edge, or both
rising and falling edges) can be specified.
(b) PCL
This is a clock output pin.
(c) BUZ
This is a buzzer output pin.
2.2.12 AVREF
This is the A/D converter reference voltage input pin and the positive power supply pin of P20 to P27 and A/D
converter.
When the A/D converter is not used, connect this pin directly to EVDD or VDD
Note.
Note Make the AVREF pin the same potential as the VDD pin when port 2 is used as a digital port.
2.2.13 AVSS
This is the A/D converter ground potential pin. Even when the A/D converter is not used, always use this pin with
the same potential as the VSS pin.
2.2.14 RESET
This is the active-low system reset input pin.
2.2.15 REGC
This is the pin for connecting regulator output (2.5 V) stabilization capacitance for internal operation. Connect this
pin to VSS via a capacitor (0.47
F: target).
REGC
VSS
Caution
Keep the wiring length as short as possible for the broken-line part in the above figure.
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