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μ
PD784915B, 784916B
27
Table 3-2. Special Function Registers (4/4)
Bit
Bit Units for
After
Address
Special Function Register (SFR) Name
Symbol
R/W
Length
Manipulation
Releasing
1 bit
-
-
-
-
-
8 bits
16 bits
-
Reset
FFB9H
FRC capture register 4H
CPT4H
R
8
√
-
Cleared to 0
FFBAH
FRC capture register 5L
CPT5L
16
√
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
FFBBH
FRC capture register 5H
CPT5H
8
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
FFC0H
Standby control register
STBC
R/W
8
0000
×
000
FFC4H
Execution speed select register
MM
W
8
20H
FFCEH
CPU clock status register
PCS
R
8
√
-
00H
FFCFH
Oscillation stabilization time specification register
OSTS
W
8
FFE0H
Interrupt control register (INTP0)
PIC0
R/W
8
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
43H
FFE1H
Interrupt control register (INTCPT3)
CPTIC3
8
FFE2H
Interrupt control register (INTCPT2)
CPTIC2
8
FFE3H
Interrupt control register (INTCR12)
CRIC12
8
FFE4H
Interrupt control register (INTCR00)
CRIC00
8
FFE5H
Interrupt control register (INTCLR1)
CLRIC1
8
FFE6H
Interrupt control register (INTCR10)
CRIC10
8
FFE7H
Interrupt control register (INTCR01)
CRIC01
8
FFE8H
Interrupt control register (INTCR02)
CRIC02
8
FFE9H
Interrupt control register (INTCR11)
CRIC11
8
FFEAH
Interrupt control register (INTCPT1)
CPTIC1
8
FFEBH
Interrupt control register (INTCR20)
CRIC20
8
FFEDH
Interrupt control register (INTTB)
TBIC
8
FFEEH
Interrupt control register (INTAD)
Interrupt control register (INTP2)
Note
Interrupt control register (INTCR40)
Note
ADIC
8
FFEFH
PIC2
8
CRIC40
FFF0H
Interrupt control register (INTUDC)
UDCIC
8
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
-
-
-
-
-
-
-
-
-
FFF1H
Interrupt control register (INTCR30)
CRIC30
8
FFF2H
Interrupt control register (INTCR50)
CRIC50
8
FFF3H
Interrupt control register (INTCR13)
CRIC13
8
FFF4H
Interrupt control register (INTCSI1)
CSIIC1
8
FFF5H
Interrupt control register (INTW)
WIC
8
FFF7H
Interrupt control register (INTP1)
PIC1
8
FFF8H
Interrupt control register (INTP3)
PIC3
8
FFFAH
Interrupt control register (INTCSI2)
CSIIC2
8
Note
PIC2 and CRIC40 are at the same address (register).
Remark
Cleared to 0: Counter is initialized to 0 within 16 clocks after the reset signal has been deasserted (the
contents before initialization are undefined).