參數(shù)資料
型號(hào)： UPD784908GF-XXX-3BA
廠商： NEC Corp.
英文描述： 16-Bit Microcontroller
中文描述： 16位微控制器
文件頁數(shù)： 56/98頁
文件大?。?/td> 657K
代理商： UPD784908GF-XXX-3BA
μ
PD784907, 784908
56
Data Sheet U11680EJ2V0DS00
CPU
SFR
Memory
Read
Write
Read
Write
Macro service
controller
Internal bus
9.3 Context Switching
When an interrupt request is generated, or when the BRKCS instruction is executed, a predetermined register bank
is selected by the hardware. Then, a branch to a vector address stored in that register bank occurs. At the same
time, the contents of the current program counter (PC) and program status word (PSW) are stacked in the register
bank.
The branch address must be within the range of 0 to FFFFH.
Figure 9-1. Context Switching Operation When Interrupt Request Is Generated
9.4 Macro Service
The macro service function enables data transfer between memory and special function registers (SFRs) without
requiring the intervention of the CPU. The macro service controller accesses both memory and SFRs within the same
transfer cycle to directly transfer data without having to perform data fetch.
Since the CPU status is neither saved nor restored, nor is data fetch performed, high-speed data transfer is possible.
Figure 9-2. Macro Service
PSW
PC19-16
0000B
PC15-0
Exchange
Save
Save
<2>
<3>
<4>
<5>
Save
<1>
<6>
<7>
Transfer
(Bits 8 to 11 of
temporary register)
Register bank n (n = 0-7)
Temporary register
A
X
B
C
R5
R4
R7
VP
UP
R6
D
E
H
T
U
V
W
L
Switching between register banks
(RBS0-RBS2
←
n)
RSS
←
0
IE
←
0
Register bank (0 to 7)
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