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參數(shù)資料
| 型號(hào)： | UPD78218ACW |
| 廠商： | NEC Corp. |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8-bit Microcontroller with 2/4/8K Bytes In-System Programmable Flash |
| 中文描述： | 8位微控制器與2/4/8K字節(jié)在系統(tǒng)可編程閃存 |
| 文件頁(yè)數(shù)： | 26/66頁(yè) |
| 文件大?。?/td> | 510K |
| 代理商： | UPD78218ACW |
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26
μ
PD78217A, 78218A
3.6.2
Clock Synchronous Serial Interface
The master device starts transmission by activating the serial clock and transfers one-byte data in synchronization
with this clock.
Fig. 3-8 Clock Synchronous Serial Interface Block Diagram
f
CLK
: Internal System Clock Frequency (System Clock Frequency/2)
(1)
3-wire serial I/O
This is an interface for communicating with devices incorporating a conventional clock synchronous serial
interface.
Basically, communication is performed with three lines, one serial clock line (SCK) and two serial data lines
(SI, SO). When connecting to multiple devices, a handshake line is necessary.
(2)
SBI
Communication with multiple devices is performed with one serial clock line (SCK) and one serial bus line (SB0).
This is NEC's standard serial interface.
The master device selects the slave device to be communicated with by outputting its “address” from the SB0
pin. Therefore, “commands” and “data” perform transfer and receive between the master and slave.
SCK
Shift Register
Internal Bus
INTCSI
SIO
S
SI
SO/SB0
Output
Latch
Set Clear
Busy/
Acknowledge
Generator
S
Interrupt
Generator
TM3 Output/2
f
CLK
/8
f
CLK
/32
Bus Release
Command/
Acknowledge
Detector
Serial Clock
Controller
Serial Clock
Counter
N-ch Open-drain output
also possible (SB0: SBI)
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