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參數(shù)資料
| 型號： | UPD77112 |
| 廠商： | NEC Corp. |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | 16-BIT FIXED-POINT DIGITAL SIGNAL PROCESSORS |
| 中文描述： | 16位定點數(shù)字信號處理器 |
| 文件頁數(shù)： | 14/80頁 |
| 文件大小： | 451K |
| 代理商： | UPD77112 |
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Data Sheet U12801EJ4V0DS00
14
μ
PD77110, 77111, 77112
Interrupt
Pin No.
Pin Name
100-pin
TQFP
80-pin
TQFP
80-pin
FBGA
I/O
Function
Shared by:
INT1 - INT3
91 - 89
77 - 75
D4, A3,
B4
Input
INT4
88
74
A4
Input
External maskable interrupt input.
Detected at the falling edge.
WAKEUP
External data memory interface
Pin No.
Pin Name
100-pin
TQFP
80-pin
TQFP
80-pin
FBGA
I/O
Function
Shared by:
X/Y
99
Output
(3S)
Memory select signal output.
0: Uses X memory.
1: Uses Y memory.
DA0 - DA14
16 - 2
Output
(3S)
Address bus of external data memory.
Accesses the external memory.
Continuously outputs the external memory
address accessed last when the external
memory is not being accessed. Kept low
(0x000) if the external memory is never
accessed after reset.
DA14 is NC (no connection) and does not
function on the
μ
PD77112.
D0 - D15
34 - 27,
24 - 17
I/O
(3S)
16-bit data bus.
Accesses the external memory.
MRD
97
Output
(3S)
Read output
External memory read
MWR
96
Output
(3S)
Write output
External memory write
HOLDRQ
92
Input
Hold request signal
Input a low level to this pin when the external
device uses the external data memory bus of
the
μ
PD77110 and 77112.
BSTB
94
Output
Bus strobe signal
This pin goes low when the
μ
PD77110 and
77112 use the external data memory bus.
HOLDAK
93
Output
Hold acknowledge signal
This pin goes low when the external device
is enabled to use the external data memory
bus of the
μ
PD77110 and 77112.
Remark
Pins marked “3S” under the heading “I/O” go into a high-impedance state in the following conditions:
X/Y, DA0-DA14, MRD, MWR: When the bus is released (HOLDAK = low level)
D0-D15: When the external data memory is not being accessed and when the bus is released
(HOLDAK = low level)
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