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參數(shù)資料
| 型號： | UPD75P108BGF-3BE |
| 廠商： | NEC Corp. |
| 英文描述： | 4-BIT SINGLE-CHIP MICROCOMPUTER |
| 中文描述： | 4位單片機(jī) |
| 文件頁數(shù)： | 14/46頁 |
| 文件大?。?/td> | 381K |
| 代理商： | UPD75P108BGF-3BE |
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14
μ
PD75P108B
4.
PROM (PROGRAM MEMORY) WRITE AND VERIFY
The ROM built into the
μ
PD75P108B is a 8064
×
8-bit PROM. The pins shown in the table below are used to
write/verify this PROM. There is no address input; instead, a method to update the address by the clock input
from the X1 pin is adopted.
Function
Voltage applecation pin for program memory write/verify
(normally V
DD
potential).
Address update clock inputs for program memory write/
verify. Inverse of X1 pin signal is input to X2 pin.
Operating mode selection pin for program memory write/
verify.
8-bit data input/output pins for progrm memory write/
verify.
Supply voltage application pin.
Applies 2.7 to 6.0 V in normal operation, and 6 V for
program memory write/verify.
Pin Name
V
PP
X1, X2
MD0 to MD3
P40 to P43 (low-order 4 bits)
P50 to P53 (high-order 4 bits)
V
DD
Note
Pins not used in a program memory write/verify operation should be connected to V
SS
with a pull-
down resistor.
4.1
PROGRAM MEMORY WRITE/VERIFY OPERATING MODES
The
μ
PD75P108B assumes the program memory write/verify mode is +6 V and +12.5 V are applied respec-
tively to the V
DD
and V
PP
pins. The table below shows the operating modes available by the MD0 to MD3 pin
setting in this mode.
V
PP
+12.5 V
V
DD
+6 V
MD0
H
L
L
H
MD1
L
H
L
×
MD2
H
H
H
H
MD3
L
H
H
H
Operating Mode
Program memory address zero-clear
Write mode
Verify mode
Program inhibit mode
Operating Mode Setting
×
: L or H
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