
μ
PD750064, 750066, 750068, 750064(A), 750066(A), 750068(A)
48
Data Sheet U10165EJ2V0DS00
Instruction
Group
Number
of Bytes
Number
of Machine
Cycles
Addressing
Area
Mnemonic
Operand
Operation
Skip Condition
Memory bit
manipulation
SET1
mem.bit
2
2
(mem.bit)
←
1
*3
fmem.bit
2
2
(fmem.bit)
←
1
*4
pmem.@L
2
2
(pmem
7–2
+L
3–2
.bit(L
1–0
))
←
1
*5
@H+mem.bit
2
2
(H+mem
3–0
.bit)
←
1
*1
CLR1
mem.bit
2
2
(mem.bit)
←
0
*3
fmem.bit
2
2
(fmem.bit)
←
0
*4
pmem.@L
2
2
(pmem
7–2
+L
3–2
.bit(L
1–0
))
←
0
*5
@H+mem.bit
2
2
(H+mem
3–0
.bit)
←
0
*1
SKT
mem.bit
2
2+S
Skip if (mem.bit)=1
*3
(mem.bit)=1
fmem.bit
2
2+S
Skip if (fmem.bit)=1
*4
(fmem.bit)=1
pmem.@L
2
2+S
Skip if (pmem
7–2
+L
3–2
.bit(L
1–0
))=1
*5
(pmem.@L)=1
@H+mem.bit
2
2+S
Skip if (H+mem
3–0
.bit)=1
*1
(@H+mem.bit)=1
SKF
mem.bit
2
2+S
Skip if (mem.bit)=0
*3
(mem.bit)=0
fmem.bit
2
2+S
Skip if (fmem.bit)=0
*4
(fmem.bit)=0
pmem.@L
2
2+S
Skip if (pmem
7–2
+L
3–2
.bit(L
1–0
))=0
*5
(pmem.@L)=0
@H+mem.bit
2
2+S
Skip if (H+mem
3–0
.bit)=0
*1
(@H+mem.bit)=0
SKTCLR
fmem.bit
2
2+S
Skip if (fmem.bit)=1 and clear
*4
(fmem.bit)=1
pmem.@L
2
2+S
Skip if (pmem
7–2
+L
3–2
.bit(L
1–0
))=1 and clear
*5
(pmem.@L)=1
@H+mem.bit
2
2+S
Skip if (H+mem
3–0
.bit)=1 and clear
*1
(@H+mem.bit)=1
AND1
CY, fmem.bit
2
2
CY
←
CY
∧
(fmem.bit)
*4
CY, pmem.@L
2
2
CY
←
CY
∧
(pmem
7–2
+L
3–2
.bit(L
1–0
))
*5
CY, @H+mem.bit
2
2
CY
←
CY
∧
(H+mem
3–0
.bit)
*1
OR1
CY, fmem.bit
2
2
CY
←
CY
∨
(fmem.bit)
*4
CY, pmem.@L
2
2
CY
←
CY
∨
(pmem
7–2
+L
3–2
.bit(L
1–0
))
*5
CY, @H+mem.bit
2
2
CY
←
CY
∨
(H+mem
3–0
.bit)
*1
XOR1
CY, fmem.bit
2
2
CY
←
CY v (fmem.bit)
*4
CY, pmem.@L
2
2
CY
←
CY v (pmem
7–2
+L
3–2
.bit(L
1–0
))
*5
CY, @H+mem.bit
2
2
CY
←
CY v (H+mem
3–0
.bit)
*1