參數(shù)資料
型號： UPD70F3302YGK-9ET
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PQFP64
封裝： 12 X 12 MM, PLASTIC, TQFP-64
文件頁數(shù)： 32/46頁
文件大?。?/td> 4121K
代理商： UPD70F3302YGK-9ET
MACH 5 Family
39
256-BALL BGA CONNECTION DIAGRAM — M5-320, M5LV-320*
Bottom View (Macrocell Association)
256-Ball BGA
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
0
987654321
A
GND
0B2
GND
0B13
4A14
GND
4A8
4A4
GND
4B4
4B8
GND
4B14
3B13
GND
A
B
GND
0A3
0B8
0B11
4A15
4A11
4A10
4A6
4A3
4A0
4B0
4B3
4B6
4B10
4B11
4B15
3B11
3B8
3B2
GND
B
C
0D15
0A8
V
CC
0B3
0B4
0B12
4A13
4A9
4A5
4A1
4B1
4B5
4B9
4B13
3B12
3B4
3B3
V
CC
3A3
3A11
C
D
0D13
0A11
0A2
V
CC
V
CC
0B7
V
CC
4A12
4A7
4A2
4B2
4B7
4B12
V
CC
3B7
V
CC
V
CC
3A2
3A8
3D15
D
E
0D10
0A13
0A4
TDI
TDO
3A4
3A13
3D12
E
F
GND
0D12
0A12
0A7
3A7
3A12
3D13
GND
F
G
0D7
0D8
0D14
V
CC
V
CC
3D14
3D9
3D7
G
H
GND
0D4
0D9
0D11
3D11
3D10
3D8
GND
H
J
0D2
0D3
0D5
0D6
3D6
3D5
3D4
3D3
J
K
GND
IO/CLK0
0D0
0D1
3D1
3D0
I3/CLK3
3D2
K
L
1D2
I1/CLK1
1D0
1D1
2D1
2D0
I2/CLK2
GND
L
M
1D3
1D4
1D5
1D6
2D6
2D5
2D3
2D2
M
N
GND
1D8
1D10
1D11
2D11
2D9
2D4
GND
N
P
1D7
1D9
1D14
V
CC
V
CC
2D14
2D8
2D7
P
R
GND
1D13
1A14
1A11
2A11
2A14
2D12
GND
R
T
1D12
1A15
1A10
TCK
TMS
2A10
2A15
2D10
T
U
1D15
1A12
1A8
V
CC
V
CC
1A4
V
CC
1B3
1B8
1B13
2B13
2B8
2B3
V
CC
2A4
V
CC
V
CC
2A8
2A13
2D13
U
V
1A13
1A9
V
CC
1A6
1A5
1A1
1B2
1B6
1B10
1B14
2B14
2B10
2B6
2B2
2A1
2A5
2A6
V
CC
2A12
2D15
V
W
GND
1A7
1A3
1A2
1B0
1B4
1B5
1B9
1B12
1B15
2B15
2B12
2B9
2B5
2B4
2B0
2A2
2A3
2A9
GND
W
Y
GND
1A0
1B1
GND
1B7
1B11
GND
2B11
2B7
GND
2B1
2A0
GND
2A7
GND
Y
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
0
987654321
20446G-029
CLK
= Clock
GND = Ground
I
= Input
I/O
= Input/Output
NC
= No Connect
VCC
= Supply Voltage
TDI
= Test Data In
TCK
= Test Clock
TMS
= Test Mode Select
TDO = Test Data Out
Pin Designations
4D
15
Macrocell (0-15)
PAL Block (A-D)
Segment (0-4)
*Package obsolete, contact factory.
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參數(shù)描述
UPD70F3306GK-9EU-A 制造商:Renesas Electronics 功能描述:V850ES 20MHz 制造商:Renesas Electronics 功能描述:V850ES 20MHz Cut Tape
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