
CHAPTER 3 CPU FUNCTIONS
User’s Manual U16890EJ1V0UD
90
Peripheral Function
Register Name
Access
k
WDTM1
Write
1 to 5
Watchdog timer 1 (WDT1)
<Calculation of number of waits>
{(1/f
X
)
×
2/((2 + m)/f
CPU
)} + 1
f
X
: Main clock oscillation frequency
Watchdog timer 2 (WDT2)
WDTM2
Write
3 (fixed)
TP0CCR0, TP0CCR1,
TP0CNT
Read
1
<Calculation of number of waits>
{(1/f
XX
)/((2 + m)/f
CPU
)} + 1
TP0CCR0, TP0CCR1
Write
0 to 2
16-bit timer/event counter P0
(TMP0)
Note 1
<Calculation of number of waits>
{(1/f
XX
)
×
5/((2 + m)/f
CPU
)}
A wait occurs when performing continuous write to same register
16-bit timer/event counters 00 to 03
(TM00 to TM03)
TMC00 to TMC03
Read-modify-write
1 (fixed)
A wait occurs during write
CSIA0B0 to CSIA0BF,
CSIA1B0 to CSIA1BF
Write
Note 2
0 to 18 (when performing
continuous write via write
instruction)
<Calculation of number of waits>
{(1/f
SCKA
)
×
5 – (4 + m)/f
CPU
)}/{((2 + m)/f
CPU
)}
However, 1 wait if f
CPU
= f
XX
if the CSISn.CKSAn1 and CSISn.CKSAn0 bits are 00.
f
SCKA
: CSIA selection clock frequency
CSIA0B0 to CSIA0BF,
CSIA1B0 to CSIA1BF
Write
Note 2
0 to 20 (when conflict
occurs between write
instruction and write via
receive operation)
Clocked serial interfaces 0 and 1 with
automatic transmit/receive function
(CSIA0, CSIA1)
<Calculation of number of waits>
{((1/f
SCKA
)
×
5)/((2 + m)/f
CPU
)}
f
SCKA
: CSIA selection clock frequency
I
2
C0
Note 3
IICS0
Read
1 (fixed)
Asynchronous serial interfaces 0, 1
(UART0, UART1)
ASIS0, ASIS1
Read
1 (fixed)
Real-time output function 0
(RTO0)
RTBL0, RTBH0
Write (when RTPC0.RTPOE0
bit = 0)
1
ADM, ADS, PFM, PFT
Write
1 to 2
ADCR, ADCRH
Read
1 to 2
A/D converter
<Calculation of maximum number of waits>
{(1/f
AD
)
×
2/[(2 + m)/f
CPU
]} + 1
f
AD
: A/D selection clock frequency
Note 4
Number of waits to be added = (2 + m)
×
k [clocks]