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參數(shù)資料
| 型號： | UPD442002-X |
| 廠商： | NEC Corp. |
| 英文描述： | 2M-BIT CMOS STATIC RAM 128K-WORD BY 16-BIT EXTENDED TEMPERATURE OPERATION |
| 中文描述： | 200萬位CMOS靜態(tài)RAM 128K的字由16位溫度范圍 |
| 文件頁數(shù)： | 17/24頁 |
| 文件大?。?/td> | 281K |
| 代理商： | UPD442002-X |
Data Sheet M14670EJ7V
1
DS
17
μ
PD442002-X
Data Retention Timing Chart
(1) /CS Controlled
V
IH
(MIN.)
V
CCDR
(MIN.)
V
IL
(MAX.)
/CS
/CS
≥
V
CC
– 0.2 V
GND
V
CC
(MIN.)
Note
t
CDR
Data retention mode
t
R
V
CC
Note
2.7 V (-BB70X), 2.2 V (-BC70X), 1.8 V (-DD85X, -DD10X)
Remark
On the data retention mode by controlling /CS, the other pins (Address, I/O, /WE, /OE, /LB, /UB) can be
in high impedance state.
(2) /LB, /UB Controlled
t
CDR
Data retention mode
V
IH
(MIN.)
V
CCDR
(MIN.)
V
IL
(MAX.)
t
R
/LB, /UB
/LB, /UB
≥
V
CC
–
0.2 V
GND
V
CC
V
CC
(MIN.)
Note
Note
2.7 V (-BB70X), 2.2 V (-BC70X), 1.8 V (-DD85X, -DD10X)
Remark
On the data retention mode by controlling /LB and /UB, the input level of /CS must be
≥
V
CC
0.2 V
or
≤
0.2 V. The other pins (Address, I/O, /WE, /OE) can be in high impedance state.
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