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參數(shù)資料
| 型號： | UPD43257BGU-70L |
| 廠商： | NEC Corp. |
| 英文描述： | 256K-BIT CMOS STATIC RAM 32K-WORD BY 8-BIT |
| 中文描述： | 256K位CMOS靜態(tài)RAM 32K的詞8位 |
| 文件頁數(shù)： | 9/20頁 |
| 文件大?。?/td> | 157K |
| 代理商： | UPD43257BGU-70L |
Data Sheet M10693EJ7V0DS00
9
μ
PD43257B
Read Cycle
Parameter
Symbol
μ
PD43257B-70
μ
PD43257B-85
Unit
Condition
MIN.
MAX.
MIN.
MAX.
Read cycle time
t
RC
70
85
ns
Address access time
t
AA
70
85
ns
Note 1
/CE1 access time
t
CO1
70
85
ns
CE2 access time
t
CO2
70
85
ns
Output hold from address change
t
OH
10
10
ns
/CE1 to output in low impedance
t
LZ1
10
10
ns
Note 2
CE2 to output in low impedance
t
LZ2
10
10
ns
/CE1 to output in high impedance
t
HZ1
30
30
ns
CE2 to output in high impedance
t
HZ2
30
30
ns
Notes 1.
See the output load shown in
Figure 1
.
2.
See the output load shown in
Figure 2
.
Remark
These AC characteristics are in common regardless of package types and L, LL versions.
Read Cycle Timing Chart
t
HZ2
t
RC
t
OH
t
HZ1
t
LZ2
t
CO2
t
LZ1
t
CO1
t
AA
High impedance
Data out
CE2 (Input)
/CE1 (Input)
Address (Input)
I/O (Output)
Remark
In read cycle, /WE should be fixed to high level.
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| UPD43257BGU-70LL | 256K-BIT CMOS STATIC RAM 32K-WORD BY 8-BIT |
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| UPD43257BGU-85LL | 256K-BIT CMOS STATIC RAM 32K-WORD BY 8-BIT |
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