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參數(shù)資料
| 型號： | UPD4218165L |
| 廠商： | NEC Corp. |
| 英文描述： | 3.3 V OPERATION 16 M-BIT DYNAMIC RAM 1 M-WORD BY 16-BIT, EDO, BYTE READ/WRITE MODE |
| 中文描述： | 3.3 V工作16 m位動態(tài)隨機存儲器1個M字由16位，江戶，字節(jié)讀/寫模式 |
| 文件頁數(shù)： | 12/48頁 |
| 文件大?。?/td> | 319K |
| 代理商： | UPD4218165L |
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μ
PD42S18165L, 4218165L
12
Write Cycle
Parameter
Symbol
t
RAC
= 50 ns
t
RAC
= 60 ns
t
RAC
= 70 ns
Unit
Notes
MIN.
MAX.
MIN.
MAX.
MIN.
MAX.
WE hold time referenced to CAS
t
WCH
7
–
10
–
10
–
ns
1
WE pulse width
t
WP
8
–
10
–
10
–
ns
1
WE lead time referenced to RAS
t
RWL
10
–
10
–
12
–
ns
WE lead time referenced to CAS
t
CWL
8
–
10
–
12
–
ns
WE setup time
t
WCS
0
–
0
–
0
–
ns
2
OE hold time
t
OEH
0
–
0
–
0
–
ns
Data-in setup time
t
DS
0
–
0
–
0
–
ns
3
Data-in hold time
t
DH
7
–
10
–
10
–
ns
3
Notes 1.
t
WP (MIN.)
is applied to late write cycles or read modify write cycles. In early write cycles, t
WCH (MIN.)
should
be met.
2.
If t
WCS
≥
t
WCS (MIN.)
, the cycle is an early write cycle and the data out will remain Hi-Z through the entire
cycle.
3.
t
DS (MIN.)
and t
DH (MIN.)
are referenced to the CAS falling edge in early write cycles. In late write cycles and
read modify write cycles, they are referenced to the WE falling edge.
Read Modify Write Cycle
Parameter
Symbol
t
RAC
= 50 ns
t
RAC
= 60 ns
t
RAC
= 70 ns
Unit
Notes
MIN.
MAX.
MIN.
MAX.
MIN.
MAX.
Read modify write cycle time
t
RWC
107
–
133
–
157
–
ns
RAS to WE delay time
t
RWD
64
–
77
–
89
–
ns
1
CAS to WE delay time
t
CWD
27
–
32
–
37
–
ns
1
Column address to WE delay time
t
AWD
39
–
47
–
54
–
ns
1
Note 1.
If t
WCS
≥
t
WCS (MIN.)
, the cycle is an early write cycle and the data out will remain Hi-Z through the entire cycle.
If t
RWD
≥
t
RWD (MIN.)
, t
CWD
≥
t
CWD (MIN.)
, t
AWD
≥
t
AWD (MIN.)
and t
CPWD
≥
t
CPWD (MIN.)
, the cycle is a read modify write
cycle and the data out will contain data read from the selected cell. If neither of the above conditions is
met, the state of the data out is indeterminate.
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