參數(shù)資料
型號: UPD178F124
英文描述: 78K/0 Series for Instructions | User's Manual[10/2001]
中文描述: 78K線/ 0系列說明|用戶手冊[10/2001]
文件頁數(shù): 36/129頁
文件大?。?/td> 644K
代理商: UPD178F124
14
User's Manual U12326EJ4V0UM
CHAPTER 2 REGISTERS
2.1 Control Registers
The control registers control the program sequence, statuses and stack memory. A program counter, a program
status word and a stack pointer are the control registers.
2.1.1 Program counter (PC)
The program counter is a 16-bit register that holds the address information of the next program to be executed.
In normal operation, the PC is automatically incremented according to the number of bytes of the instruction
to be fetched. When a branch instruction is executed, immediate data and register contents are set.
RESET input sets the reset vector table values at addresses 0000H and 0001H to the program counter.
Figure 2-1. Program Counter Configuration
2.1.2 Program status word (PSW)
The program status word is an 8-bit register consisting of various flags to be set/reset by instruction execution.
Program status word contents are automatically stacked upon interrupt request generation or PUSH PSW
instruction execution and are automatically reset upon execution of the RETB, RETI and POP PSW instructions.
RESET input sets the PSW to 02H.
Figure 2-2. Program Status Word Configuration
15
0
PC
70
IE
Z
RBS1
AC
RBS0
0
ISP
CY
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