參數(shù)資料
型號: UPD17246MC-xxx-5A4
廠商: NEC Corp.
英文描述: 4-BIT SINGLE-CHIP MICROCONTROLLERS FOR SMALL GENERAL-PURPOSE INFRARED REMOTE CONTROL TRANSMITTERS
中文描述: 4位單片微控制器的小型通用兩用紅外遙控遞質(zhì)
文件頁數(shù): 66/102頁
文件大小: 461K
代理商: UPD17246MC-XXX-5A4
66
Data Sheet U15002EJ1V0DS
μ
PD17240, 17241, 17242, 17243, 17244, 17245, 17246
8.3
Interrupt Sequence
If the IRQ
××
flag is set to 1 when the IP
××
flag is
1
, interrupt processing is started after the instruction cycle of
the instruction executed when the IRQ
××
flag was set has ended. Since the MOVT instruction, EI instruction, and
the instruction that matches the condition to skip use two instruction cycles, the interrupt enabled while this instruction
is executed is processed after the second instruction cycle is over.
If the IP
××
flag is
0
, the interrupt processing is not performed even if the IRQ
××
flag is set, until the IP
××
flag is
set.
If two or more interrupts are enabled simultaneously, the interrupts are processed starting from the one with the
highest priority. The interrupt with the lower priority is held pending until the processing of the interrupt with the higher
priority is finished.
8.3.1
Operations when interrupt is acknowledged
When an interrupt has been acknowledged, the CPU performs processing in the following sequence:
Clears IRQ
×××
corresponding to
INTE flag and acknowledged interrupt
Decrements value of stack pointer by 1
(SP
1)
Saves contents of program counter to
stack addressed by stack pointer
Loads vector address to program counter
Save contents of PSWORD to interrupt stack register
One instruction cycle is required to perform the above processing.
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