
CHAPTER 13 PERIPHERAL HARDWARE
120
13.1.3 Operation of 8-bit Timer Counters
(1) Count Register
Count register are 8-bit up counters whose initial values are 00H. They are incremented each time a count
pulse is entered.
The counter register is initialized in the following situations:
when the microcontroller is reset (refer to
CHAPTER 6 RESET
);
when the content of the 8-bit modulo register coincides with the count register value, thus causing the
comparator to generate the relevant signal; and
when "1" is written in the TMRES of the register file.
(2) Modulo register
The modulo registers determine the count value of count register. They are initialized to FFH.
A value is set in a modulo register via the data buffer (DBF) using the PUT instruction.
(3) Comparator
The comparators output match signals when the value of the count register and modulo register match and
when the next count pulse is input. That is, if the value of the modulo register is initial value FFH, the
comparator outputs a match signal when 256 is counted.
The match signal from the comparator clears the contents of the count register to 0 and automatically sets
the interrupt request flag (IRQTM) to 1. At this time interrupt handling occurs if the EI instruction (interrupt
acceptance enable instruction) is executed and also the interrupt enable flag (IPTM) is set. When an interrupt
is accepted, the interrupt request flag (IRQTM) is set to 0 and program control transfers to the interrupt
handling routine.
13.1.4 Selecting Count Pulse
A count pulse is selected with TMCK0 or TMCK1.
One system clock f
X
can be selected from four types: a 2048-count pulse, 256-count pulse, 32-count pulse, and
an external count pulse input from the INT pin.
At reset, TMCK0 and TMCK1 are 0 and f
X
/256 is selected.
At power start-up or reset, timer is used to generate stabilization wait time. For this purpose, the initial values
are TMCK0=0 and TMCK1=0 and f
X
/256 is selected. Since the initial value is set to TMEN=1, the system starts at
address 0000H after 8 ms after reset at f
X
=8 MHz (32 ms at f
X
=2 MHz). (Refer to
CHAPTER 16
RESET
.)