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參數(shù)資料
| 型號： | UPD16655N |
| 廠商： | NEC Corp. |
| 英文描述： | 240-OUTPUT TFT-LCD GATE DRIVER |
| 中文描述： | 240輸出的TFT - LCD柵極驅(qū)動器 |
| 文件頁數(shù)： | 5/12頁 |
| 文件大?。?/td> | 71K |
| 代理商： | UPD16655N |
Data Sheet S11950EJ2V0DS00
5
μ
PD16655
3. In an application where the V
EE
power supply is not shifted, short-circuit V
EE2
(driver power) and V
EE1
(logic power) outside the TCP. Fix unused pins to the V
EE
level.
4. The level shift range of V
EE2
must be V
EE1
≤
V
EE2
≤
V
DD
– 15 V. Note that, in this case, the guaranteed
values of the output ON resistance and output fall time slightly change. (V
DD
= V
DD1
= V
DD2
)
5. TIMING CHART
CLK
1
O
3
O
239
O
240
STVL
(STVR)
O
1
of
next stage
O
2
of
next stage
2
3
239
240
241
242
O
1
STVR
(STVL)
O
2
Caution Do not use a sequence in which the outputs change all at once because such a sequence may
cause malfunctioning.
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