參數(shù)資料
型號: UPD16431A
廠商: NEC Corp.
英文描述: 1/2, 1/3, 1/4-DUTY LCD CONTROLLER/DRIVER
中文描述: 1 / 2,1 / 3,1/4-DUTY LCD控制器/驅(qū)動
文件頁數(shù): 8/34頁
文件大小: 179K
代理商: UPD16431A
μ
PD16431A
8
CONFIGURATION OF KEY DATA LATCH
The key data is latched as illustrated below and is read by a read command, starting from the most
significant bit. Key data is read once a frame and latched when coinciding with the immediadtely preceding
data. In other words, it requires at least 2 frames from the time the key is pressed till data is confirmed to
be the key data (the key request becoming H).
32-bit latch/SHIFT register
KS
1
MSB
LSB
KS
2
KS
3
KS
4
KS
5
KS
6
KS
7
KS
8
KEY
1
KEY
2
KEY
3
KEY
4
The key data is 0 when off and 1 when on.
KEY INPUT EQUIVALENT CIRCUIT
KEY n
To key latch
Pull-down
control signal
The pull-down control signal goes high only during key
source output and turns on the pull-down transistor.
The on-resistance of the pull-down transistor is several k
.
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