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參數(shù)資料
| 型號： | UPC4093C |
| 廠商： | NEC Corp. |
| 英文描述： | J-FET INPUT LOW-OFFSET OPERATIONAL AMPLIFIER |
| 中文描述： | J - FET輸入低失調(diào)運算放大器 |
| 文件頁數(shù)： | 3/12頁 |
| 文件大?。?/td> | 90K |
| 代理商： | UPC4093C |
3
μ
PC4093
ELECTRICAL CHARACTERISTICS (T
A
= 25 °C, V
±
=
±
15 V)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
Input Offset Voltage
V
IO
R
S
≤
50
±
1
±
2.5
mV
Input Offset Current
Note 7
I
IO
±
25
±
100
pA
Input Bias Current
Note 7
I
B
50
200
pA
Large Signal Voltage Gain
A
V
R
L
≥
2 k
, V
O
=
±
10 V
25000
200000
Supply Current
I
CC
I
O
= 0 A
2.5
3.4
mA
Common Mode Rejection Ratio
CMR
70
100
dB
Supply Voltage Rejection Ratio
SVR
70
100
dB
R
L
≥
10 k
±
12
+14.0
–13.3
V
Output Voltage Swing
V
om
R
L
≥
2 k
±
10
+13.5
–12.8
V
Common Model Input Voltage Range
V
ICM
±
11
+14
–12
V
Slew Rate
SR
A
V
= 1
25
V/
μ
s
Unity Gain Frequency
f
unity
6
MHz
Input Equivalent Noise Voltage Density
e
n
R
S
= 100
, f = 1 kHz
19
nV/
√
Hz
Input Offset Voltage
V
IO
R
S
≤
50
, T
A
= –20 to +70 °C
±
5
mV
Average V
IO
Temperature Drift
V
IO
/
T
T
A
= –20 to +70 °C
±
7
μ
V/°C
Input Offset Current
Note 7
I
IO
T
A
= –20 to +70 °C
±
2
nA
Input Bias Current
Note 7
I
B
T
A
= –20 to +70 °C
7
nA
Notes 7.
Input bias currents flow into IC. Because each currents are gate leak current of P-channel J-FET on input
stage. And that are temperature sensitive. Short time measuring method is recommendable to maintain
the junction temperature close to the operating ambient temperature.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UPC4093G2 | 制造商:NEC 制造商全稱:NEC 功能描述:J-FET INPUT LOW-OFFSET OPERATIONAL AMPLIFIER |
| UPC4093G2-E1-A | 制造商:Renesas Electronics Corporation 功能描述:Amp,Op amp,Single,J-FET,SOP8 |
| UPC4094 | 制造商:NEC 制造商全稱:NEC 功能描述:Bipolar Analog Integrated Circuits |
| UPC4094C | 制造商:NEC 制造商全稱:NEC 功能描述:J-FET INPUT LOW-OFFSET DUAL OPERATIONAL AMPLIFIER |
| UPC4094G2 | 制造商:NEC 制造商全稱:NEC 功能描述:J-FET INPUT LOW-OFFSET DUAL OPERATIONAL AMPLIFIER |
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