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參數(shù)資料
| 型號： | UPC2533GS-01 |
| 元件分類： | 接收器 |
| 英文描述： | AM, AUDIO SINGLE CHIP RECEIVER, PDSO36 |
| 封裝： | 0.300 INCH, PLASTIC, SSOP-36 |
| 文件頁數(shù)： | 6/36頁 |
| 文件大?。?/td> | 240K |
| 代理商： | UPC2533GS-01 |
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14
PC2533
2.4
RF AGC Block
Fig. 2-4 RF AGC Block
–
+
–
+
35
36
34
R402
Q402
Q403
Q401
R403
R405
Q405
Q404
R404
R406
D401
R408
Q406
R409
R410
Q407
Q408
R412
AMP.
Bias
circuit
Time
constant
switchover
To RF amplifier
circuit (Fig. 2-1)
Detection
and
addition
circuit
From MIX2
(Fig. 2-3)
From MIX1
(Fig. 2-2)
+
The configuration of the RF AGC is shown in Fig. 2-4. After being detected by the RF AGC detector and added,
the input signal from MIX1 and MIX2 is smoothed by external capacitor of pin 34, and its DC voltage controls the RF
AGC.
RF AGC output controls the PIN diode from pin 36 and controls base voltage of cascade transistor which determines
FET VDS from pin 35. In addition, by detecting sudden fluctuation of pin 34 voltage and switching over time constants,
RF AGC response convergence when the electric field suddenly changes is improved.
Operation start time of the RF AGC can be delayed slightly by connecting a resistor parallel to the external capacitor
of pin 34.
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