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參數(shù)資料
| 型號(hào)： | UPC1830GT |
| 廠商： | NEC Corp. |
| 英文描述： | FILTER-CONTAINING VIDEO CHROMA, SYNCHRONIZING SIGNAL PROCESSING LSI COMPATIBLE WITH NTSC/PAL SYSTEM |
| 中文描述： | 過濾含視頻色度，同步信號(hào)處理LSI兼容NTSC制式/ PAL制 |
| 文件頁(yè)數(shù)： | 20/44頁(yè) |
| 文件大?。?/td> | 338K |
| 代理商： | UPC1830GT |
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μ
PC1830
20
(7) Horizontal/vertical counter circuit
Horizontal counter circuit
Divides a 32f
H
signal to generate horizontal timing signals such as HD and BLK signals.
525/625 counter circuit
Performs counting at 4f
H
and generates a vertical timing signal.
Generates VD in 0.75H delay from the falling edge of a vertical sync. signal in an odd field and in 0.75H delay
from the falling edge of a vertical sync. signal in an even field.
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