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參數(shù)資料
| 型號(hào)： | UPC1652G |
| 廠(chǎng)商： | NEC Corp. |
| 英文描述： | SILICON MONOLITHIC BIPOLAR INTEGRATED CIRCUIT WIDE BAND AMPLIFIER |
| 中文描述： | 硅單片雙極集成電路寬帶放大器 |
| 文件頁(yè)數(shù)： | 1/8頁(yè) |
| 文件大?。?/td> | 40K |
| 代理商： | UPC1652G |
Document No. P12443EJ5V0DS00 (5th edition)
Date Published November 1999 N CP(K)
Printed in Japan
DATA SHEET
BIPOLAR ANALOG INTEGRATED CIRCUIT
μ
PC1652G
SILICON MONOLITHIC BIPOLAR INTEGRATED CIRCUIT
WIDE BAND AMPLIFIER
1983, 1999
The mark
shows major revised points.
DESCRIPTION
The
μ
PC1652G is a silicon monolithic integrated circuit
especially designed as a wide band amplifier convering HF band
through UHF band.
PIN CONNECTIONS
FEATURES
Excellent frequency response : 1 200 MHz TYP. @ 3 dB down
High power gain : 18 dB TYP. @ f = 500 MHz
Low voltage operation : V
CC
= 5 V
SOP package
ABSOLUTE MAXIMUM RATINGS (T
A
= +25
°
C)
Supply Voltage
Total Power dissipation
Operating Ambient Temperature
Storage Temperature
V
CC
P
D
T
A
T
stg
7
V
440
mW
°
C
°
C
20 to +75
40 to +125
EQUIVALENT CIRCUIT
ELECTRICAL CHARACTERISTICS (T
A
= +25
°
C, V
CC
= 5 V)
CHARACTERISTIC
SYMBOL MIN. TYP. MAX. UNIT
TEST CONDITIONS
Circuit Current
I
CC
15
20
25
mA
No signals
Power Gain
G
P
16
18
20
dB
f = 500 MHz
Noise Figure
NF
5.5
6.5
dB
f = 500 MHz
Band Width
BW
1000 1200
MHz 3 dB down below flat gain
Isolation
I
SO
23
26
dB
f = 500 MHz
Input Return Loss
S
11
17
20
dB
f = 500 MHz
Output Return Loss
S
22
12
15
dB
f = 500 MHz
Maximum Output Level
P
O
3
5
dBm f = 500 MHz
NEC cannot assume any responsibility for any circuits shown or represent that
they are free from patent infringement
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
1
INPUT
2
GND
3
GND
4
GND
8
GND
7
V
CC
6
V
CC
5
OUTPUT
V
CC
OUT
GND
IN
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